BMA253
Data sheet
Page 86
Register 0x33 (TRIM_NVM_CTRL)
Contains the control settings for the few-time programmable non-volatile memory (NVM).
Name
Bit
0x33
7
TRIM_NVM_CTRL
6
5
4
Read/Write
R
R
R
R
Reset
n/a
n/a
n/a
n/a
Value
Content
nvm_remain<3:0>
3
Bit
2
1
0
Read/Write R/W
R
n/a
W
0
R/W
0
Reset
0
Value
Content
nvm_load
nvm_rdy
nvm_prog_trig
nvm_prog_mode
nvm_remain<3:0>: number of remaining write cycles permitted for NVM; the number is
decremented each time a write to the NVM is triggered
nvm_load:
´1´ trigger, or ‘0’ do not trigger an update of all configuration registers
from NVM; the nvm_rdy flag must be ‘1’ prior to triggering the update
nvm_rdy:
status of NVM controller: ´0´ NVM write / NVM update operation is in
progress, ´1´ NVM is ready to accept a new write or update trigger
nvm_prog_trig:
‘1’ trigger, or ‘0’ do not trigger an NVM write operation; the trigger is
only accepted if the NVM was unlocked before and nvm_remain<3:0> is
greater than ‘0’; flag nvm_rdy must be ‘1’ prior to triggering the write cycle
nvm_prog_mode: ‘1’ unlock, or ‘0’ lock NVM write operation
BST-BMA253-DS000-01 | Revision 1.0 | August 2015
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Note: Specifications within this document are subject to change without notice.