PCM1808
www.ti.com
SLES177A–APRIL 2006–REVISED AUGUST 2006
TYPICAL PERFORMANCE CURVES (Continued)
All specifications at TA = 25°C, VCC = 5 V, VDD = 3.3 V, master mode, fS = 48 kHz, system clock = 512 fS, 24-bit data, unless
otherwise noted.
OUTPUT SPECTRUM (Continued)
THD + N
vs
SIGNAL LEVEL
0
−10
−20
−30
−40
−50
−60
−70
−80
−90
−100
−100 −90 −80 −70 −60 −50 −40 −30 −20 −10
0
Signal Level − dB
G015
Figure 15.
SUPPLY CURRENT
SUPPLY CURRENT
vs
fSAMPLE CONDITION
15
I
I
CC
DD
10
5
(1)
(2)
(3)
System Clock = 384 f
System Clock = 512 f
System Clock = 256 f
S
S
S
0
(1)
(2)
(3)
44.1
f
48
96
Condition − kHz
SAMPLE
G016
Figure 16.
10
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