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PCM1796 参数 Datasheet PDF下载

PCM1796图片预览
型号: PCM1796
PDF下载: 下载PDF文件 查看货源
内容描述: 24位192 kHz的采样高级分段音频立体声数字模拟转换器 [24BIT 192 KHZ SAMPLING ADVANCED SEGMENT AUDIO STEREO DIGITAL TO ANALOG CONVERTER]
分类和应用: 转换器
文件页数/大小: 57 页 / 508 K
品牌: BB [ BURR-BROWN CORPORATION ]
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www.ti.com  
SLES100 − DECEMBER 2003  
FUNCTIONS AVAILABLE IN THE EXTERNAL DIGITAL FILTER MODE  
The external digital filter mode is selected by setting DSD = 0 (register 20, B5) and DFTH = 1 (register 20. B4).  
The external digital filter mode allows access to the majority of the PCM1796 mode control functions.  
The following table shows the register mapping available when the external digital filter mode is selected, along with  
descriptions of functions which are modified when using this mode selection.  
B15 B14 B13 B12 B11 B10  
B9  
0
B8  
0
B7  
B6  
B5  
B4  
B3  
B2  
B1  
B0  
Register 16 R/W  
Register 17 R/W  
Register 18 R/W  
Register 19 R/W  
Register 20 R/W  
Register 21 R/W  
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
0
0
0
1
1
1
0
1
1
0
FMT2 FMT1 FMT0  
1
1
REV  
SRST  
0
OPE  
DFMS  
INZD  
OS0  
PCMZ  
0
0
1
MONO CHSL OS1  
0
1
Register 22  
R
1
0
ZFGR ZFGL  
NOTE: −: Function is disabled. No operation even if data bit is set  
FMT[2:0]: Audio Data Format Selection  
Default value: 000  
FMT[2:0]  
000  
Audio Data Format Select  
16-bit right-justified format (default)  
20-bit right-justified format  
24-bit right-justified format  
N/A  
001  
010  
Other  
OS[1:0]: Delta-Sigma Modulator Oversampling Rate Selection  
Default value: 00  
OS[1:0]  
00  
Operation Speed Select  
8 times WDCK (default)  
4 times WDCK  
01  
10  
16 times WDCK  
11  
Reserved  
The effective oversampling rate is determined by the oversampling performed by both the external digital filter and  
the delta-sigma modulator. For example, if the external digital filter is 8× oversampling, and the user selects  
OS[1:0] = 00, then the delta-sigma modulator oversamples by 8×, resulting in an effective oversampling rate of 64×.  
The 16× WDCK oversampling rate is not available above a 100-kHz sampling rate. If the oversampling rate selected  
is 16× WDCK, the system clock frequency must be over 256 f .  
S
40  
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