While in the power-down mode, the voltage on the capaci-
tors connected to CAP and REF will begin to leak off. The
voltage on the CAP capacitor leaks off much more rapidly
than the REF capacitor (the REF input of the ADS7812
becomes high impedance when PWDN is HIGH—this is not
true for the CAP input). When the power-down mode is
exited, these capacitors must be allowed to recharge and
settle to a 12-bit level. Figure 11 shows the amount of time
typically required to obtain a valid 12-bit result based on the
amount of time spent in power down (at room temperature).
This figure assumes that the total capacitance on the CAP
pin is 1.01µF.
The range for the external reference is 2.3V to 2.7V. The
voltage on REF determines the full-scale range of the con-
verter and the corresponding LSB size. Increasing the refer-
ence voltage will increase the LSB size in relation to the
internal noise sources which, in turn, can improve signal-to-
noise ratio. Likewise, decreasing the reference voltage will
reduce the LSB size and signal-to-noise ratio.
CAP
The CAP pin is used to compensate the internal reference
buffer. A 1µF tantalum capacitor in parallel with a 0.01µF
ceramic capacitor should be connected between this pin and
ground, with the ceramic capacitor placed as close as pos-
sible to the ADS7812. The total value of the capacitance on
the CAP pin is critical to optimum performance of the
ADS7812. A value larger than 2.0µF could overcompensate
the buffer while a value lower than 0.5µF may not provide
adequate compensation.
Figure 12 provides a circuit which can significantly reduce
the power up time if the power down time will be fairly brief
(a few seconds or less). A low on-resistance MOSFET is
used to disconnect the capacitance on the CAP pin from the
leakage paths internal to the ADS7812. This allows the
capacitors to retain their charge for a much longer period of
time, reducing the time required to recharge them at power
up. With this circuit, the power down time can be extended
to tens or hundreds of milliseconds with almost instanta-
neous power up.
BUF
The voltage on the BUF pin is the output of the internal
reference buffer. This pin is used to provide +2.5V to the
analog input or inputs for the various input configurations.
The BUF output can provide up to 1mA of current to an
external load. The load should be constant as a variable load
could affect the conversion result by modulating the BUF
voltage. Also note that the BUF output will show significant
glitches as each bit decision is made during a conversion.
Between conversions, the BUF output is quiet.
POWER-DOWN TO POWER-UP RESPONSE
300
TA = +25°C
250
200
150
100
50
POWER DOWN
The ADS7812 has a power-down mode that is activated by
taking CONV LOW and then PWRD HIGH. This will
power down all of the analog circuitry including the refer-
ence, reducing power dissipation to under 50µW. To exit the
power-down mode, CONV is taken HIGH and then PWRD
is taken LOW. Note that a conversion will be initiated if
PWRD is taken HIGH while CONV is LOW.
0
0.1
1
10
100
Power-Down Duration (ms)
FIGURE 11. Power-Down to Power-Up Response.
1RF7604
1
2
3
4
8
7
6
5
1
2
3
4
5
6
7
8
R1IN
GND
R2IN
R3IN
BUF
CAP
REF
GND
VS 16
PWRD 15
BUSY 14
CS 13
Power-Down Signal
CONV 12
EXT/INT 11
DATA 10
+
1µF
0.01µF
DATACLK
9
FIGURE 12. Improved Power-Up Response Circuit.
®
ADS7812
14
BB [ BURR-BROWN CORPORATION ]
