ADS1230
www.ti.com
SBAS366–OCTOBER 2006
VOLTAGE REFERENCE INPUTS
(REFP, REFN)
ESD diodes protect the reference inputs. To prevent
these diodes from turning on, make sure the
voltages on the reference pins do not go below GND
by more than 100mV, and likewise, do not exceed
AVDD by 100mV:
The voltage reference used by the modulator is
generated from the voltage difference between
REFP and REFN: VREF = REFP – REFN. The
reference inputs use a structure similar to that of the
analog inputs. In order to increase the reference
input impedance, a switching buffer circuitry is used
GND – 100mV < (REFP or REFN) < AVDD + 100mV
CLOCK SOURCES
to reduce the input equivalent capacitance.
A
The ADS1230 can use an external clock source or
internal oscillator to accommodate a wide variety of
applications. Figure 20 shows the equivalent circuitry
of the clock source. The CLK_DETECT block
determines whether the crystal oscillator/external
clock signal is applied to the CLKIN pin so that the
internal oscillator is bypassed or activated. When the
CLKIN pin frequency is above ~200kHz, the
CLK_DETECT output goes low and shuts down the
internal oscillator. When the CLKIN pin frequency is
below ~200kHz, the CLK_DETECT output goes high
and activates the internal oscillator. It is highly
recommended to hard-wire the CLKIN pin to ground
when the internal oscillator is chosen.
simplified diagram of the circuitry on the reference
inputs is shown in Figure 19. The switches and
capacitors can be modeled with an effective
impedance of:
1
ZEFF
+
2fMODCBUF
Where:
fMOD = modulator sampling frequency (76.8kHz)
CBUF = input capacitance of the buffer
For the ADS1230:
1
ZEFF
+
+ 200MW
(2)(76.8kHz)(32.5fF)
REFP
REFN
CLKIN
CLK_DETECT
EN
Internal
Oscillator
AVDD
AVDD
S0
S1
S
ESD
MUX
Protection
To ADC
CBUF
ZEFF = 200MW(1)
Figure 20. Equivalent Circuitry of the Clock
Source
(1) fMOD = 76.8kHz
An external clock may be used by driving the CLKIN
pin directly. The Electrical Characteristics table
shows the allowable frequency range. The clock
input may be driven with 5V logic, regardless of the
DVDD or AVDD voltage.
Figure 19. Simplified Reference Input Circuitry
11
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