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ADS1208IPWG4 参数 Datasheet PDF下载

ADS1208IPWG4图片预览
型号: ADS1208IPWG4
PDF下载: 下载PDF文件 查看货源
内容描述: 2阶Δ-Σ调制器,激励霍尔元件 [2nd-Order Delta-Sigma Modulator with Excitation for Hall Elements]
分类和应用: 转换器光电二极管
文件页数/大小: 22 页 / 369 K
品牌: BB [ BURR-BROWN CORPORATION ]
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ADS1208  
www.ti.com  
SBAS348AMARCH 2005REVISED MARCH 2005  
APPLICATION INFORMATION  
should be used at the output of the delta-sigma  
modulator. The primary purpose of the digital filter is  
to remove high-frequency noise. The secondary pur-  
pose is to convert the 1-bit data stream at a high  
sampling rate into a higher-bit data word at a lower  
rate (that is, decimation). A digital signal processor  
(DSP), microcontroller (µC), or field programmable  
gate array (FPGA) could be used to implement the  
digital filter.  
GENERAL DESCRIPTION  
The ADS1208 is a 2nd-order delta-sigma modulator,  
which is implemented with a switched capacitor  
circuit. The analog input signal is continuously  
sampled by the modulator and compared to an  
internal voltage reference. A digital bit stream, which  
accurately represents the analog input voltage over  
time, appears at the output of the converter.  
Analog Inputs  
The ADS1208 is optimized for Hall sensors and  
similar applications. As a result, the full-scale input  
range is ±VREFIN/20, which is typically ±125mV. How-  
ever, to achieve good noise and linearity, only 80% of  
this range should be used (±100mV). The analog  
input pins (VIN+ and VIN-) are internally buffered with  
two low-noise, high bandwidth, low offset amplifiers.  
The internal sampling capacitors present a very  
significant load that needs to be recharged within  
50ns. The ADS1208 provides two input buffers to  
decouple the sampling capacitors from the pins (VIN+  
VIN–). These buffers provide high bandwidth  
(typically, 50MHz) at a low noise and low offset. This  
configuration improves the system performance sig-  
nificantly, if the input source has a high impedance in  
the krange. A source impedance in this range  
without buffers would decrease THD and linearity  
significantly, and would also cause a gain error that  
changes with supply or temperature.  
,
a
A current source is also integrated into the ADS1208  
that can be used for biasing a Hall element or bridge  
sensor. This current can be programmed with a  
resistor that must be placed between AVDD and  
IADJ.  
Additionally, the ADS1208 includes a reference volt-  
age source with a buffered output. A reference input  
pin is provided as well. The voltage at the REFIN pin  
sets the analog input range.  
The input buffers have an auto zero function to  
reduce the input offset. The auto zero switches of the  
input buffers may apply a glitch of 10fC to 50fC to the  
signal source in each clock cycle. For this reason,  
placing a 1nF capacitor between the inputs is rec-  
ommended, if the source impedance is larger than  
500. See Figure 35 for the equivalent input circuit,  
including the protection diodes.  
The device digital interface is fully compatible with the  
ADS1202 and ADS1203. The ADS1208 also provides  
inverted outputs of MCLK and MDATA (MCLK and  
MDATA, respectively) to increase noise immunity for  
the digital data transmission.  
The clock source can be internal as well as external.  
Different clock frequencies in combination with an  
optional digital filter enable a variety of solutions and  
signal bandwidths.  
AVDD  
AZ  
VIN+  
Figure 5 (page 8) shows the functional block diagram  
with external circuitry. The Hall element is biased  
from the internal current source. The current is set by  
resistor RADJ. An offset compensation of the Hall  
element is enabled by the optional resistors R1 to R4.  
The analog inputs VIN+ and VIN– are directly connec-  
ted with the Hall element outputs. The reference input  
REFIN is connected to the reference output REFOUT  
with an optional RC low-pass filter, for additional  
noise filtering. For both power-supply pairs, AVDD  
and BVDD, decoupling capacitors of 100nF and 10µF  
(respectively) are recommended.  
Delta−Sigma  
Modulator  
AZ  
VIN  
Figure 35. Equivalent Input Circuit  
Internal Reference  
The ADS1208 includes a 2.5V reference. The refer-  
ence output is connected to the REFOUT pin via an  
output buffer that can source 3mA. The sink current is  
limited to 50µA. The output resistance of this buffer is  
0.3. The internal reference is also used to control  
the current source at the IOUT pin.  
ANALOG SECTION  
Modulator  
The 2nd-order modulator acts as a filter. The input  
signal is low-passed while the quantization noise is  
shifted to higher frequencies. A digital low-pass filter  
The ADS1208 additionally provides a REFIN pin. The  
applied voltage VREFIN sets the gain of the internal  
15  
 
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