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AL462 参数 Datasheet PDF下载

AL462图片预览
型号: AL462
PDF下载: 下载PDF文件 查看货源
内容描述: [Ultra HD FIFO Memory]
分类和应用: 先进先出芯片
文件页数/大小: 38 页 / 3431 K
品牌: AVERLOGIC [ AVERLOGIC TECHNOLOGIES INC ]
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AL462 4K2K Ultra HD FIFO Datasheet  
(16EN=“H”) respectively  
R4, P5  
Read Frame select pin in Two Frame Mode  
(TFEN =”H”):  
“L”: Frame 0  
RFSEL0 &  
RFSEL1  
I
“H”: Frame 1  
RFSEL0 is read frame select signal to control  
all 32-bit bus operation in 32-bit mode  
(16EN=“L”); RFSEL0 and RFSEL1 are read  
frame select signals to control dual 16-bit  
DOA[15:0] and DOB[15:0] bus operation in 16-  
bit mode (16EN=“H”) respectively.  
**Note2: For the polarity definition of all read control signals (REN, OE, RRST,), please refer to PLRTY pin  
definition and “Memory Operation” section for details.  
*Note3: Signals RCKO, REO and RCKOINV are not available in reversion “A”. The active states for the loop-  
out read clock control signals, REO and RCKOINV are also determined by PLRTY pin definitions: active  
“High” when PLRTY is “GND”, active “Low” when PLRTY is “VDD”.  
Power/Ground Signals  
Pin Name  
Ball No  
Type Description  
1.8V ±5% power supply for internal memory  
F2, G3, G2, M14,  
M15, L14, L15, K13,  
K14, K10, K15,K16,  
H10, K17, F13, E13  
E7,N6,N14,N9,N12,  
E11,E9,E10,E8  
DVC18, DVQ18  
PW  
VDD  
PW  
PW  
1.8V ± 5% power supply for internal control logic  
1.8V ±5% power supply for PLL  
H8, J8, K8  
AVDD18_PLL1,AV  
DD18_PLL2,AVDD  
18_PLL3  
B9, F16, B11, H16  
VDD33A, VDD33B,  
VDD33C, VDD33D  
VDD33E,VDD33F,  
VDD33G,VDD33H  
FVDD33  
VD33M  
VSS  
PW  
PW  
3.3V ± 5% power supply for input I/O  
3.3V ± 5% power supply for output I/O  
N5, T5, U16, R16,  
U6, N10, T17, P16  
J1  
PW  
PW  
3.3V ± 5% power supply for internal logic  
3.3V ± 5% power supply for internal logic  
E6  
D1,E2,G1,J3N7,  
N15,T7,N13,M4,M16  
,L13,L16,H13,J14,J1  
5,J13,J16,J10,H14,G  
13,E12,J17,A12,G16  
,A10  
GND Internal memory chip GND  
D2,M13,U4,T6,  
N16,N8,U8,N11,P1  
7,G17,B10,E17,A8  
J2  
GND  
VSS33  
Input/ Output data I/O GND  
GND  
GND  
FVSS33  
GND  
H9, J9, K9  
AVSS_PLL1,  
AVSS_PLL2,AVSS  
_PLL3  
PLL GND  
©2016~2019 by AverLogic Technologies, Corp.  
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