AL422
The 3.3V configuration (direct replacement of the previous AL422V3) is as follows:
3.3V
3.3V
AL422B
10
19
VDD
DEC
0.1uF
0.1uF
8.3 Restrictions
8.3.1 Irregular Read/Write
It is recommended that the WCK and RCK are kept running at least 1MHz at all times. The faster one of
WCK and RCK is used as the DRAM refresh timing clock and has to be kept free running. When irregular
FIFO I/O control is needed, keep the clock free running and use /WE or /RE to control the I/O as follows:
WCK
Data
/WE
AL422-17 Slow Write - Correct
The following drawing shows irregular clock and should be avoided:
WCK
Data
/WE
AL422-16 Slow Write - Incorrect
© 1999~2006 by AverLogic Technologies, Corp.
Version 1.5
17
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