AL422
Read Operation
Data output DO7~DO0 is written into the read register at the RCK input when both /RE and /OE are pulled
low. The output data is ready after TAC (access time) from the rising edge of the RCK input cycle.
The read address pointer is stopped at the current position when /RE is pulled high, and starts there when
/RE is pulled low again.
/OE needs to be pulled low for read operations. When /OE is pulled high, the data outputs will be at high
impedance stage. The read address pointer still increases synchronously with RCK regardless of the /OE
status. The /RE and /OE signals need to meet the setup time and hold time requirements with reference to
the RCK input cycle.
When the new data is read, the read address should be between 128 to 393,247 cycles after the write
address, otherwise the output may not be new data.
8.2 5V and 3.3V applications
The AL422 can accept either 3.3V or 5V power with slightly different external configuration. The internal
voltage regulator can convert 5V power to 3.3V for the embedded DRAM and logic circuitry when 5V
power is applied to VDD pin (#10) only and leave the DEC pin (#19) decoupled by a capacitor of 1mF or
2.2mF to ground. The regulator can also be bypassed when 3.3V power is applied to both VDD and DEC
pins. In either case the AL422 is 5V or 3.3V I/O tolerant. The 3.3V configuration consumes less power
and is free from noise interference from the voltage regulator so may be more ideal for high-speed
applications.
Please note that using the AL422B with 5V configuration can directly replace the previous AL422V5; using
it with 3.3V configuration can directly replace the previous AL422V3. No additional modification is
required.
The 5V configuration (direct replacement of the previous AL422V5) is as follows:
5V
AL422B
VDD
DEC
0.1uF
2.2uF
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Version 1.5
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