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5962-8767905KUC 参数 Datasheet PDF下载

5962-8767905KUC图片预览
型号: 5962-8767905KUC
PDF下载: 下载PDF文件 查看货源
内容描述: [2 CHANNEL LOGIC OUTPUT OPTOCOUPLER, 0.4Mbps, HERMETIC SEALED, DIP-16]
分类和应用: 输出元件光电
文件页数/大小: 13 页 / 210 K
品牌: AVAGO [ AVAGO TECHNOLOGIES LIMITED ]
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Hermetically Sealed, Transistor Output Optocouplers  
for Analog and Digital Applications  
4N55*, 5962-87679, HCPL-553X, HCPL-653X, HCPL-257K,  
HCPL-655X, 5962-90854, HCPL-550X  
*See matrix for available extensions.  
Data Sheet  
Description  
Features  
Theseunitsaresingle,dualandquadchannel,hermetically Dual Marked with Device Part Number and DSCC  
sealedoptocouplers.Theproductsarecapableofoperation  
and storage over the full military temperature range and  
can be purchased as either standard product or with full  
MIL-PRF-38534 Class Level H or K testing or from the ap-  
Drawing Number  
ManufacturedandTestedonaMIL-PRF-38534Certified  
Line  
propriateDSCCDrawing.Alldevicesaremanufacturedand  
tested on a MIL-PRF-38534 certified line and are included  
in the DSCC Qualified Manufacturers List QML-38534 for  
Hybrid Microcircuits.  
QML-38534, Class H and K  
Five Hermetically Sealed Package Configurations  
Performance Guaranteed over Full Military  
Temperature Range: -55°C to +125°C  
Applications  
High Speed: Typically 400 kBit/s  
9 MHz Bandwidth  
Military and Space  
Open Collector Output  
High Reliability Systems  
Vehicle Command, Control, Life Critical Systems  
Line Receivers  
2-18 Volt V Range  
CC  
1500 Vdc Withstand Test Voltage  
High Radiation Immunity  
6N135, 6N136, HCPL-2530/2531,  
Function Compatibility  
Switching Power Supply  
Voltage Level Shifting  
Analog Signal Ground Isolation  
(see Figures 7, 8, and 13)  
Reliability Data  
Isolated Input Line Receiver  
Isolated Output Line Driver  
Logic Ground Isolation  
Harsh Industrial Environments  
Isolation for Test Equipment Systems  
The connection of a 0.1 µF bypass capacitor between V and GND is recommended.  
CC  
CAUTION: It is advised that normal static precautions be taken in handling and assembly  
of this component to prevent damage and/or degradation which may be induced by ESD.