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AS8FLC1M32BQT-120/Q 参数 Datasheet PDF下载

AS8FLC1M32BQT-120/Q图片预览
型号: AS8FLC1M32BQT-120/Q
PDF下载: 下载PDF文件 查看货源
内容描述: 全封闭,多芯片模块( MCM ) 32MB, 1M ×32 , 3.0Volt引导块闪存阵列 [Hermetic, Multi-Chip Module (MCM) 32Mb, 1M x 32, 3.0Volt Boot Block FLASH Array]
分类和应用: 闪存
文件页数/大小: 27 页 / 293 K
品牌: AUSTIN [ AUSTIN SEMICONDUCTOR ]
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SEMICONDUCTOR, INC.  
FLASH  
AS8FLC1M32  
Austin Semiconductor, Inc.  
The remaining scenario is that the system initially determines  
that the toggle bit is toggling and DQ5, 13, 21, and or DQ29 has  
not gone High. The system may continue to monitor the toggle  
bit and DQ5, 13, 21, and or DQ29 through successive READ  
cycles, determining the status as described in the previous  
paragraph. Alternatively, it may choose to perform other system  
tasks. In this case, the system must start at the beginning of  
the Algorithm when it returns to determine the status of the  
operation.  
DQ5,13,21,and or DQ29: Exceeding Timing Limits  
DQ5, 13, 21, and or DQ29 indicates whether the PROGRAM or  
ERASE time has exceeded a specified internal pulse count limit.  
Under these conditions this will produce a logic level “1” High.  
This is a failure condition that indicates the PROGRAM or  
ERASE cycle was not successfully completed.  
The DQ5, 13, 21 and or DQ29 failure condition may appear if  
the system tries to PROGRAM a “1” to a location that was  
previously PROGRAMMED to a logic level “0” Low. Only an  
ERASE operation can change a logic level “0” back to a Logic  
Level “1”. Under this condition, the device halts operation  
and when the operation has exceeded the timing limits, DQ5,  
13, 21, and or DQ29 will produce a logic level “1”.  
Toggle BitAlgorithm Diagram  
Start  
READ(#1) Byte  
Data from Byte1, 2,  
3 and or 4  
Under both of these conditions, the system must issue the  
RESET command to return to reading array data.  
DQ3, 11, 19, and or DQ27: Sector Erase Timer  
After WRITING a Sector Erase command sequence, the system  
may read this status bit or bits to determine whether or not an  
ERASE operation has begun. If additional sectors are selected  
for ERASURE, the entire time-out also applies after each  
additional Sector Erase command. When the time-out is  
complete, this status bit or bits changes from a logic level “0”  
to “1”. The system may ignore this status bit if the system can  
guarantee that the time between additional Sector Erase  
command will always be less than 50us.  
READ(#2) Byte  
Data from Byte1, 2,  
3 and or 4  
NO  
Toggle Bit =  
Toggle?  
YES  
DQ5, 13, 21  
and or DQ29 =  
"1"  
NO  
After the Sector Erase command sequence is WRITTEN, the  
system should read the status on DQ7, 15, 23 and or DQ31  
(Data\ Polling) or DQ6, 14, 22, and or DQ30 (Toggle Bit I) to  
ensure the device has accepted the command sequence. Then  
READ DQ3, 11, 19 and or DQ27, looking for this bit or bits to be  
a logic level “1”. If this bit is a logic level “1”, the internally  
controlled ERASE cycle has begun; all further commands are  
ignored until the ERASE operation is complete. If this bit is a  
logic level “0”, the device will accept additional Sector Erase  
commands. To ensure the command has been accepted, the  
system software should check the status of DQ3, 11, 19 and or  
DQ27 prior to and following each subsequent Sector Erase  
command. If this bit or bits is a logic level “1” on the second  
status check, the last command might not have been accepted.  
YES  
READ(#1) Byte  
Data from Byte1, 2,  
3 and or 4  
READ(#2) Byte  
Data from Byte1, 2,  
3 and or 4  
NO  
Toggle Bit =  
Toggle?  
YES  
Operation Not  
Complete, WRITE  
RESET Command  
PROGRAM/  
ERASE Complete  
Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.  
AS8FLC1M32B  
Rev. 3.3 05/08  
13  
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