AUSTIN SEMICONDUCTOR, INC.
FLASH
AS8FLC1M32
Austin Semiconductor, Inc.
If a program address falls within a protected sector, DQ6, 14,
22, and or DQ30 will toggle for approximately 1us after the
PROGRAM command sequence is WRITTEN, then returns to
READINGArray data.
DQ7, DQ15, DQ23 and DQ31 may change asynchronously with
the 7 lower order bits within each Byte, while the OEx\ pins are
asserted Low.
RY/BY\: Ready/Busy\
DQ6, 14, 22, and or DQ30 also toggles during the ERASE
SUSPEND program mode, stops toggling once the operation
is complete.
The RY/BY\ pin is a dedicated, open-drain output pin that
indicates whether an EmbeddedAlgorithm is in the progress or
complete. The RY/BY\ status is valid after the rising edge of
the final WEx\ pulse in the command sequence has terminated.
Since the RY/BY\ is an open-drain output, the Byte Ready/
Busy pins are wire-or’d together, indicating the Ready/Busy
status of the Four-Byte module.
DQ2, DQ10, DQ18 and DQ26: Toggle Bit II
The “Toggle Bit II” on each of the Bytes, when used with DQ6,
14, 22, and DQ30 indicates whether a particular sector is actively
ERASING or whether that sector is ERASE-SUSPENDED.
Toggle Bit II is valid after the rising edge of the final WEx\
pulse in the command sequence.
If the output is low (BUSY), the device is actively ERASING or
PROGRAMMING. If the output is high (READY), the device is
ready to READ array data, or is in the STANDBY mode.
DQ2, 10, 18 and or DQ26 toggles when the system READS at
addresses within those sectors that have been selected for
ERASURE, but does not indicate when a sector is being
ERASED. DQ6, 14, 22 and DQ30 by comparison indicates that
a device is actively ERASING or in ERASE SUSPEND, but
cannot distinguish which sectors are selected for the operation,
therefore both status bits are required for sector and mode
information.
DQ6, DQ14, DQ22 and DQ30: Toggle Bit 1
Toggle Bit 1 indicates whether an Embedded Program or Erase
Algorithm is in progress, complete, or has entered the ERASE
SUSPEND mode. Toggle Bit 1 may be read at any address and
is valid after the rising edge of the final WEx\ pulse in the
command sequence as well as during the sector ERASE time-
out.
During an Embedded Program or Erase Algorithm operation,
successive READ cycles that access any address will cause
this status indicator to toggle. When the operation is complete,
the status bit will stop toggling.
Reading Toggle Bits I/II
Whenever the system initially begins READING toggle bit
statuses, it must READ Byte data (ie…DQ0-7, DQ8-15, DQ16-
23 and or DQ24-31) at least twice in a row to determine whether
a Toggle Bit is toggling. Typically, the system would note and
store the value of the toggle bit after the first READ. After the
second READ, the system would compare the new value of
the Toggle Bit with the first. If the toggle bit is not toggling the
device has completed the PROGRAM or ERASE operation.
The system can READ array data on each Byte during the next
READ cycle.
After an ERASE command sequence is WRITTEN, if all sectors
selected for ERASING are protected, the toggle bit(s) will toggle
for approximately 100uS, then will become steady state as the
device returns to READING array data. If not all selected sectors
are protected, the Embedded Erase Algorithm will cause
ERASURE of unprotected sectors, ignoring the selected sectors
that are protected.
If after the initial two READ cycles, the system determines that
the toggle bit is still toggling, the system also should note
whether the value of DQ5, 13, 21 and or DQ29 is High. If High,
the system should then determine again whether the toggle
bit(s) are again toggling, since the toggle bit may have indeed
stop toggling just as DQ5, 13, 21 and or DQ29 went High. If the
toggle bit is no longer toggling, the device has successfully
completed the operation. If the toggle bit is still active
(toggling), the device has not successfully completed the
operation and the system must WRITE the RESET command
to return to READING array data.
The System can use DQ2, DQ6 of Byte 1; DQ10, DQ14 of Byte
2; DQ18, DQ22 of Byte 3; DQ26, DQ30 of Byte 4 together to
determine whether a sector is actively ERASING or is ERASE
SUSPENDED. When the device is actively ERASING the DQ6
of Byte 1; DQ14 of Byte 2; DQ22 of Byte 3 and DQ30 of Byte 4
toggles and when the devices enters ERASE SUSPEND, the
status bit returns to a steady state. However, the system must
also use DQ2 of Byte 1; DQ10 of Byte 2, DQ18 of Byte 3 and
DQ26 of Byte 4 to determine which sectors are ERASING or
ERASE SUSPENDED in each of the Bytes contained in the
Module.Alternatively DQ7, DQ15, DQ23 and DQ31 can be used
(see DQ7, DQ15, DQ23, DQ31 Data\ Polling).
Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.
AS8FLC1M32B
Rev. 3.3 05/08
12
AUSTIN [ AUSTIN SEMICONDUCTOR ]
