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AS8FLC1M32BQT-120/Q 参数 Datasheet PDF下载

AS8FLC1M32BQT-120/Q图片预览
型号: AS8FLC1M32BQT-120/Q
PDF下载: 下载PDF文件 查看货源
内容描述: 全封闭,多芯片模块( MCM ) 32MB, 1M ×32 , 3.0Volt引导块闪存阵列 [Hermetic, Multi-Chip Module (MCM) 32Mb, 1M x 32, 3.0Volt Boot Block FLASH Array]
分类和应用: 闪存
文件页数/大小: 27 页 / 293 K
品牌: AUSTIN [ AUSTIN SEMICONDUCTOR ]
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SEMICONDUCTOR, INC.  
FLASH  
AS8FLC1M32  
Austin Semiconductor, Inc.  
ERASING sectors, since the codes are not stored in the memory  
Data\ PollingAlgorithm Diagram  
Array. When the device exits theAutoselect mode, the device  
reverts to the ERASE SUSPEND mode, and is ready for another  
valid operation.  
Start  
The system must WRITE the ERASE RESUME command to  
exit the ERASE SUSPEND mode and continue the SECTOR  
ERASE operation. Further WRITES of the RESUME command  
are ignored. Another ERASE SUSPEND command can be  
WRITTEN after the device has resumed ERASING.  
READ Byte Data  
Address = VA  
READ Byte Data  
Address = VA  
DQ7, DQ15,  
DQ23, DQ31=  
Data?  
DQ7, DQ15,  
DQ23, DQ31=  
Data?  
YES  
YES  
Erase Operation Diagram  
Start  
NO  
NO  
Write ERASE  
Command  
Sequence  
FAIL  
PASS  
DQ5, DQ13,  
DQ21,  
DQ29=1?  
NO  
YES  
Data Poll from  
System  
Algorithm is complete, the device outputs the datum  
PROGRAMMED into each of these status bits. The system  
must provide the PROGRAM address to READ valid status  
information. If a PROGRAM address fails within a protected  
sector, Data\ Polling is active for approximately 1uS, then the  
device returns to reading array data.  
NO  
Data = FFh?  
YES  
ERASURE  
Completed  
During the Embedded EraseAlgorithm, Data\ Polling produces  
a “0” on the Data\ Polling Status bits. When the Embedded  
ERASEAlgorithm is complete, or if the device enters the ERASE  
SUSPEND mode, Data\ Polling produces a “1” on each of the  
Data\ Polling status bits. This is analogous to the complement/  
true data output described for the Embedded Program  
Algorithm: the ERASE function changes all the bits in a sector  
to “1”; prior to this, the device outputs the “compliment”, or  
“0”. The system must provide an address within any of the  
sectors selected for ERASURE to READ valid status  
information.  
Write Operation Status  
The device provides several bits to determine the status of a  
write operation: DQ2, DQ3, DQ5, DQ6 and DQ7 of Byte 1;  
DQ10, DQ11, DQ13, DQ14 and DQ15 of Byte 2; DQ18, DQ19,  
DQ21, DQ22 and DQ23 of Byte 3; as well as, DQ26, DQ27,  
DQ29, DQ30 and DQ31 of Byte 4. In addition, the RY/BY\ pin  
is also used in the monitoring of this operation.  
DQ7, DQ15, DQ23 and DQ31: Data\ Polling  
The Data\ Polling bit per byte, indicates to the host system  
whether an Embedded Algorithm is in progress or completed,  
or whether the device is in ERASE SUSPEND. Data\ Polling is  
valid after the rising edge of the final WEx\ pulse in the  
PROGRAM or ERASE command sequence.  
After an ERASE Command sequence is WRITTEN, if all s4ctors  
selected for erasing are protected, Data\ Polling is active for  
approximately 100uS, then the device returns to READING  
array data. If not all selected sectors are protected, the  
Embedded ERASEAlgorithm ERASES the unprotected sectors,  
and ignores the selected sectors that are protected.  
During the Embedded Program Algorithm, the device outputs  
on DQ7 for Byte 1, DQ15 for Byte 2, DQ23 for Byte 3, and DQ31  
for Byte 4, the complement of the datum programmed to each  
of these bits. This status also applies to the PROGRAMMING  
during ERASE SUSPEND. When the Embedded Program  
When the system detects a Data\ Polling status bit has changed  
from the complement to true data, it can READ valid data at  
each of the Bytes on the following READ cycles. This is  
because  
Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.  
AS8FLC1M32B  
Rev. 3.3 05/08  
10