SDRAM
AS4SD4M16
Austin Semiconductor, Inc.
WRITEs
the last of a burst of two or the last desired of a longer burst.
WRITE bursts are initiated with a WRITE command, The 64Mb SDRAM uses a pipelined architecture and therefore
as shown in Figure 13.
does not require the 2n rule associated with a prefetch architec-
The starting column and bank addresses are provided ture. A WRITE command can be initiated on any clock cycle
with the WRITE command, and AUTO PRECHARGE is either following a previous WRITE command. Full-speed random write
enabled or disabled for that access. If AUTO PRECHARGE is accesses within a page can be performed to the same bank, as
enabled, the row being accessed is precharged at the comple- shown in Figure 16, or each subsequent WRITE may be per-
tion of the burst. For the generic WRITE commands used in the formed to a different bank.
following illustrations, AUTO PRECHARGE is disabled.
During WRITE bursts, the first valid data-in element
will be registered coincident with the WRITE command. Subse-
quent data elements will be registered on each successive posi-
tive clock edge. Upon completion of a fixed-length burst, as-
suming no other commands have been initiated, the DQs will
T0
T1
T2
T3
remain High-Z and any additional input data will be ignored
(see Figure 14). A full-page burst will continue until terminated.
(At the end of the page, it will wrap to column 0 and continue.)
Data for any WRITE burst may be truncated with a
CLK
WRITE
NOP
NOP
NOP
COMMAND
subsequent WRITE command, and data for a fixed-length
WRITE burst may be immediately followed by data for a WRITE
command. The new WRITE command can be issued on any
clock following the previous WRITE command, and the data
provided coincident with the new command applies to the new
command. An example is shown in Figure 15. Data n + 1 is either
BANK,
COL n
ADDRESS
DQ
DIN
n
DIN n+1
NOTE: Burst length = 2. DQM is LOW.
Figure 14
WRITE BURST
CLK
T0
T1
T2
CLK
HIGH
CKE
WRITE
WRITE
NOP
COMMAND
CS\
RAS\
CAS\
WE\
BANK,
COL b
BANK,
COL n
ADDRESS
DQ
DIN
n
DIN n+1
DIN
b
COLUMN ADDRESS
A0-A7: x16
NOTE: DQM is LOW. Each WRITE command may be to any bank.
A8, A9, A11: x16
DON’T CARE
Figure 15
ENABLE AUTO PRECHARGE
A10
DISABLE AUTO PRECHARGE
WRITETO WRITE
BA0,1
BANK ADDRESS
Figure 13
WRITE COMMAND
Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.
AS4SD4M16
Rev. 2.1 6/05
19
AUSTIN [ AUSTIN SEMICONDUCTOR ]
