DRAM
AS4LC4M16
Austin Semiconductor, Inc.
NOTES (Continued):
35. VIH overshoot: VIH (MAX) - VCC + 2V for a pulse width £
3ns, and the pulse width cannot be greater than one third of the
cycle rate. VIL undershoot: VIL (MIN) = -2V for a pulse width £
3ns, and the pulse width cannot be greater then one third of the
cycle rate.
36. NC pins are assumed to be left floating and are not tested for
leakage.
37. Self refresh and extended refresh for the device requires that
at least 4,096 cycles be completed every 128ms.
38. Self refresh version on IT temp parts only.
AS4LC4M16
AustinSemiconductor,Inc.reservestherighttochangeproductsorspecificationswithoutnotice.
Rev. 1.0 7/02
12
AUSTIN [ AUSTIN SEMICONDUCTOR ]
