iPEM
4.2 Gb SDRAM-DDR2
Austin Semiconductor, Inc.
AS4DDR264M64PBG1
DC OPERATING CONDITIONS
All Voltages referenced to Vss
Parameter
Supply Voltage
Symbol
VCC
MIN
1.7
TYP
1.8
MAX
1.9
Units
Notes
V
V
V
V
1
4
2
3
VCCQ
VREF
VTT
I/O Supply Voltage
1.7
1.8
1.9
I/O Reference Voltage
I/O Termination Voltage
0.49 x VCCQ
VREF - 0.04
0.50 x VCCQ
VREF
0.51 x VCCQ
VREF + 0.04
1. VCCQ tracks VCC due to direct tie in package.
2. VREF is expected to equal VCCQ/2 of the transmitting device and to track variations in the DC level of the same. Peak-to-peak noise on VREF may not
exceed 1 percent of the DC value. Peak-to-peak AC noise on VREF may not exceed 2 percent of VREF. This measurement is to be taken at the
nearest VREF bypass capacitor.
3. VTT is not applied directly to the device. VTT is a system supply for signal termination resistors, is expected to be set equal to VREF and must track
variations in the DC level of VREF.
4. VCCQ tracks with VCC track with VCC.
ABSOLUTE MAXIMUM RATINGS
Symbol
VCC
Parameter
Voltage on VCC pin relative to VSS
Voltage on VCCQ pin relative to V
Min
-1.0
Max
2.3
Unit
V
VCCQ
-0.5
2.3
V
SS
VIN, VOUT
TSTG
Voltage on any pin relative to V
-0.5
2.3
V
oC
oC
SS
Storage Temperature
-55.0
-55.0
125.0
125.0
TCASE
Device Operating Temperature
ADDR, BAx
-8
8
uA
RAS\, CAS\, WE\, CS\,
CKE, DM, DQS, DQS\,
RDQS
-5
5
uA
Input Leakage current; Any input 0V<V <VCC
IN
;
VREF =
II
.5XVCCQ; Other balls not under test = 0V
CK, CK\
DM
-5
-5
5
5
uA
uA
OV VOUT VDDQ, DQ & ODT Disabled
VREF Leakage Current
IOZ
-5
5
uA
uA
IVREF
-10
10
INPUT / OUTPUT CAPACITANCE
TA = 25oC, f = 1 MHz, VCC = VCCQ = 1.8V
Parameter
Symbol
Max
Unit
CADDR
CIN2
Input capacitance (A0-A12, BA0-BA2, CS\, RAS\, CAS\, WE\, CKE, ODT)
Input capacitance CK, CK#
20
8
pF
pF
pF
pF
CIN3
Input capacitance DM, DQS, DQS#
10
12
COUT
Input capacitance DQ0-71
Austin Semiconductor, Inc.
●
Austin, Texas
●
512.339.1188
●
www.austinsemiconductor.com
AS4DDR264M64PBG1
Rev. 0.5 06/08
21
AUSTIN [ AUSTIN SEMICONDUCTOR ]
