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MEGA128CAN 参数 Datasheet PDF下载

MEGA128CAN图片预览
型号: MEGA128CAN
PDF下载: 下载PDF文件 查看货源
内容描述: 微控制器,带有ISP功能的Flash和CAN控制器128K字节 [Microcontroller WITH 128K BYTES OF ISP FLASH AND CAN CONTROLLER]
分类和应用: 微控制器
文件页数/大小: 413 页 / 5507 K
品牌: ATMEL [ ATMEL ]
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Compare Match Output  
Unit  
The Compare Output mode (COM0A1:0) bits have two functions. The Waveform Gener-  
ator uses the COM0A1:0 bits for defining the Output Compare (OC0A) state at the next  
compare match. Also, the COM0A1:0 bits control the OC0A pin output source. Figure 40  
shows a simplified schematic of the logic affected by the COM0A1:0 bit setting. The I/O  
Registers, I/O bits, and I/O pins in the figure are shown in bold. Only the parts of the  
general I/O port control registers (DDR and PORT) that are affected by the COM0A1:0  
bits are shown. When referring to the OC0A state, the reference is for the internal OC0A  
Register, not the OC0A pin. If a system reset occur, the OC0A Register is reset to “0”.  
Figure 40. Compare Match Output Unit, Schematic  
COMnx1  
Waveform  
Generator  
COMnx0  
FOCnx  
D
Q
1
0
OCnx  
Pin  
OCnx  
D
Q
PORT  
D
Q
DDR  
clkI/O  
Compare Output Function  
The general I/O port function is overridden by the Output Compare (OC0A) from the  
Waveform Generator if either of the COM0A1:0 bits are set. However, the OC0A pin  
direction (input or output) is still controlled by the Data Direction Register (DDR) for the  
port pin. The Data Direction Register bit for the OC0A pin (DDR_OC0A) must be set as  
output before the OC0A value is visible on the pin. The port override function is indepen-  
dent of the Waveform Generation mode.  
The design of the Output Compare pin logic allows initialization of the OC0A state  
before the output is enabled. Note that some COM0A1:0 bit settings are reserved for  
certain modes of operation. See “8-bit Timer/Counter Register Description” on page 104  
Compare Output Mode and  
Waveform Generation  
The Waveform Generator uses the COM0A1:0 bits differently in Normal, CTC, and  
PWM modes. For all modes, setting the COM0A1:0 = 0 tells the Waveform Generator  
that no action on the OC0A Register is to be performed on the next compare match. For  
compare output actions in the non-PWM modes refer to Table 55 on page 105. For fast  
PWM mode, refer to Table 56 on page 105, and for phase correct PWM refer to Table  
57 on page 106.  
A change of the COM0A1:0 bits state will have effect at the first compare match after the  
bits are written. For non-PWM modes, the action can be forced to have immediate effect  
by using the FOC0A strobe bits.  
98  
AT90CAN128  
4250E–CAN–12/04  
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