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MEGA128CAN 参数 Datasheet PDF下载

MEGA128CAN图片预览
型号: MEGA128CAN
PDF下载: 下载PDF文件 查看货源
内容描述: 微控制器,带有ISP功能的Flash和CAN控制器128K字节 [Microcontroller WITH 128K BYTES OF ISP FLASH AND CAN CONTROLLER]
分类和应用: 微控制器
文件页数/大小: 413 页 / 5507 K
品牌: ATMEL [ ATMEL ]
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clkTn  
top  
Timer/Counter clock, referred to as clkT0 in the following.  
Signalize that TCNT0 has reached maximum value.  
Signalize that TCNT0 has reached minimum value (zero).  
bottom  
Depending of the mode of operation used, the counter is cleared, incremented, or dec-  
remented at each timer clock (clkT0). clkT0 can be generated from an external or internal  
clock source, selected by the Clock Select bits (CS02:0). When no clock source is  
selected (CS02:0 = 0) the timer is stopped. However, the TCNT0 value can be accessed  
by the CPU, regardless of whether clkT0 is present or not. A CPU write overrides (has  
priority over) all counter clear or count operations.  
The counting sequence is determined by the setting of the WGM01 and WGM00 bits  
located in the Timer/Counter Control Register (TCCR0A). There are close connections  
between how the counter behaves (counts) and how waveforms are generated on the  
Output Compare output OC0A. For more details about advanced counting sequences  
and waveform generation, see “Modes of Operation” on page 99.  
The Timer/Counter Overflow Flag (TOV0) is set according to the mode of operation  
selected by the WGM01:0 bits. TOV0 can be used for generating a CPU interrupt.  
Output Compare Unit  
The 8-bit comparator continuously compares TCNT0 with the Output Compare Register  
(OCR0A). Whenever TCNT0 equals OCR0A, the comparator signals a match. A match  
will set the Output Compare Flag (OCF0A) at the next timer clock cycle. If enabled  
(OCIE0A = 1 and Global Interrupt Flag in SREG is set), the Output Compare Flag gen-  
erates an Output Compare interrupt. The OCF0A flag is automatically cleared when the  
interrupt is executed. Alternatively, the OCF0A flag can be cleared by software by writ-  
ing a logical one to its I/O bit location. The Waveform Generator uses the match signal  
to generate an output according to operating mode set by the WGM01:0 bits and Com-  
pare Output mode (COM0A1:0) bits. The max and bottom signals are used by the  
Waveform Generator for handling the special cases of the extreme values in some  
modes of operation (See “Modes of Operation” on page 99 ).  
Figure 39 shows a block diagram of the Output Compare unit.  
Figure 39. Output Compare Unit, Block Diagram  
DATA BUS  
OCRnx  
TCNTn  
= (8-bit Comparator )  
OCFnx (Int.Req.)  
top  
bottom  
FOCn  
Waveform Generator  
OCnx  
WGMn1:0  
COMnX1:0  
96  
AT90CAN128  
4250E–CAN–12/04  
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