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ATMEGA48PA-AU 参数 Datasheet PDF下载

ATMEGA48PA-AU图片预览
型号: ATMEGA48PA-AU
PDF下载: 下载PDF文件 查看货源
内容描述: 8位微控制器与4/8/ 16 / 32K字节的系统内可编程闪存 [8-bit Microcontroller with 4/8/16/32K Bytes In-System Programmable Flash]
分类和应用: 闪存微控制器和处理器外围集成电路时钟
文件页数/大小: 448 页 / 12817 K
品牌: ATMEL [ ATMEL ]
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ATmega48PA/88PA/168PA/328P  
Figure 27-2. Addressing the Flash Which is Organized in Pages(1)  
PCMSB  
PAGEMSB  
PROGRAM  
COUNTER  
PCPAGE  
PCWORD  
PAGE ADDRESS  
WITHIN THE FLASH  
WORD ADDRESS  
WITHIN A PAGE  
PROGRAM MEMORY  
PAGE  
PAGE  
INSTRUCTION WORD  
PCWORD[PAGEMSB:0]:  
00  
01  
02  
PAGEEND  
Note:  
1. PCPAGE and PCWORD are listed in Table 27-11 on page 299.  
Figure 27-3. Programming the Flash Waveforms(1)  
F
A
B
C
D
E
B
C
D
E
G
H
0x10  
ADDR. LOW  
DATA LOW  
DATA HIGH  
ADDR. LOW DATA LOW  
DATA HIGH  
ADDR. HIGH  
XX  
XX  
XX  
DATA  
XA1  
XA0  
BS1  
XTAL1  
WR  
RDY/BSY  
RESET +12V  
OE  
PAGEL  
BS2  
Note:  
1. “XX” is don’t care. The letters refer to the programming description above.  
27.7.5  
Programming the EEPROM  
The EEPROM is organized in pages, see Table 27-12 on page 299. When programming the  
EEPROM, the program data is latched into a page buffer. This allows one page of data to be  
programmed simultaneously. The programming algorithm for the EEPROM data memory is as  
follows (refer to ”Programming the Flash” on page 302 for details on Command, Address and  
Data loading):  
1. A: Load Command “0001 0001”.  
2. G: Load Address High Byte (0x00 - 0xFF).  
3. B: Load Address Low Byte (0x00 - 0xFF).  
4. C: Load Data (0x00 - 0xFF).  
304  
8161D–AVR–10/09  
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