ATmega48PA/88PA/168PA/328P
Table 27-15. XA1 and XA0 Coding
XA1
XA0
Action when XTAL1 is Pulsed
0
0
1
1
0
1
0
1
Load Flash or EEPROM Address (High or low address byte determined by BS1).
Load Data (High or Low data byte for Flash determined by BS1).
Load Command
No Action, Idle
Table 27-16. Command Byte Bit Coding
Command Byte
1000 0000
0100 0000
0010 0000
0001 0000
0001 0001
0000 1000
0000 0100
0000 0010
0000 0011
Command Executed
Chip Erase
Write Fuse bits
Write Lock bits
Write Flash
Write EEPROM
Read Signature Bytes and Calibration byte
Read Fuse and Lock bits
Read Flash
Read EEPROM
27.7 Parallel Programming
27.7.1
Enter Programming Mode
The following algorithm puts the device in Parallel (High-voltage) Programming mode:
1. Set Prog_enable pins listed in Table 27-14 on page 300 to “0000”, RESET pin to 0V and
V
CC to 0V.
2. Apply 4.5 - 5.5V between VCC and GND.
Ensure that VCC reaches at least 1.8V within the next 20 µs.
3. Wait 20 - 60 µs, and apply 11.5 - 12.5V to RESET.
4. Keep the Prog_enable pins unchanged for at least 10µs after the High-voltage has been
applied to ensure the Prog_enable Signature has been latched.
5. Wait at least 300 µs before giving any parallel programming commands.
6. Exit Programming mode by power the device down or by bringing RESET pin to 0V.
If the rise time of the VCC is unable to fulfill the requirements listed above, the following alterna-
tive algorithm can be used.
1. Set Prog_enable pins listed in Table 27-14 on page 300 to “0000”, RESET pin to 0V and
V
CC to 0V.
2. Apply 4.5 - 5.5V between VCC and GND.
3. Monitor VCC, and as soon as VCC reaches 0.9 - 1.1V, apply 11.5 - 12.5V to RESET.
301
8161D–AVR–10/09
ATMEL [ ATMEL ]
