ATmega48PA/88PA/168PA/328P
7.6
Register Description
7.6.1
EEARH and EEARL – The EEPROM Address Register
Bit
15
14
13
12
11
10
9
8
EEAR8
EEAR0
0
0x22 (0x42)
0x21 (0x41)
–
–
–
–
–
–
–
EEARH
EEARL
EEAR7
EEAR6
EEAR5
EEAR4
EEAR3
EEAR2
EEAR1
7
R
6
R
5
R
4
R
3
R
2
R
1
R
Read/Write
Initial Value
R/W
R/W
X
R/W
0
R/W
0
R/W
0
R/W
0
R/W
0
R/W
0
R/W
0
X
X
X
X
X
X
X
X
• Bits 15..9 – Res: Reserved Bits
These bits are reserved bits in the ATmega48PA/88PA/168PA/328P and will always read as
zero.
• Bits 8..0 – EEAR8..0: EEPROM Address
The EEPROM Address Registers – EEARH and EEARL specify the EEPROM address in the
256/512/512/1K bytes EEPROM space. The EEPROM data bytes are addressed linearly
between 0 and 255/511/511/1023. The initial value of EEAR is undefined. A proper value must
be written before the EEPROM may be accessed.
EEAR8 is an unused bit in ATmega48PA and must always be written to zero.
7.6.2
EEDR – The EEPROM Data Register
Bit
0x20 (0x40)
7
6
5
4
3
2
1
0
MSB
LSB
R/W
0
EEDR
Read/Write
Initial Value
R/W
0
R/W
0
R/W
0
R/W
0
R/W
0
R/W
0
R/W
0
• Bits 7..0 – EEDR7.0: EEPROM Data
For the EEPROM write operation, the EEDR Register contains the data to be written to the
EEPROM in the address given by the EEAR Register. For the EEPROM read operation, the
EEDR contains the data read out from the EEPROM at the address given by EEAR.
7.6.3
EECR – The EEPROM Control Register
Bit
0x1F (0x3F)
7
6
–
5
EEPM1
R/W
X
4
EEPM0
R/W
X
3
EERIE
R/W
0
2
EEMPE
R/W
0
1
EEPE
R/W
X
0
EERE
R/W
0
–
EECR
Read/Write
Initial Value
R
0
R
0
• Bits 7..6 – Res: Reserved Bits
These bits are reserved bits in the ATmega48PA/88PA/168PA/328P and will always read as
zero.
• Bits 5, 4 – EEPM1 and EEPM0: EEPROM Programming Mode Bits
The EEPROM Programming mode bit setting defines which programming action that will be trig-
gered when writing EEPE. It is possible to program data in one atomic operation (erase the old
value and program the new value) or to split the Erase and Write operations in two different
operations. The Programming times for the different modes are shown in Table 7-1. While EEPE
21
8161D–AVR–10/09
ATMEL [ ATMEL ]
