ATmega16/32/64/M1/C1
• Bit 5 – ENRX: Enable Receive Interrupt
– 0 - interrupt disabled.
– 1- receive interrupt enabled.
• Bit 4 – ENTX: Enable Transmit Interrupt
– 0 - interrupt disabled.
– 1- transmit interrupt enabled.
• Bit 3 – ENERR: Enable MOb Errors Interrupt
– 0 - interrupt disabled.
– 1- MOb errors interrupt enabled.
• Bit 2 – ENBX: Enable Frame Buffer Interrupt
– 0 - interrupt disabled.
– 1- frame buffer interrupt enabled.
• Bit 1 – ENERG: Enable General Errors Interrupt
– 0 - interrupt disabled.
– 1- general errors interrupt enabled.
• Bit 0 – ENOVRT: Enable CAN Timer Overrun Interrupt
– 0 - interrupt disabled.
– 1- CAN timer interrupt overrun enabled.
16.10.5 CAN Enable MOb Registers - CANEN2 and CANEN1
Bit
7
6
5
4
3
2
1
0
-
-
ENMOB5
ENMOB4
ENMOB3
ENMOB2
ENMOB1
ENMOB0
CANEN2
CANEN1
-
15
R
0
-
14
R
0
-
13
R
0
-
12
R
0
-
11
R
0
-
10
R
0
-
-
Bit
9
R
0
R
0
8
R
0
R
0
Read/Write
Initial Value
Read/Write
Initial Value
R
0
R
0
R
0
R
0
R
0
R
0
• Bits 5:0 - ENMOB5:0: Enable MOb
This bit provides the availability of the MOb.
It is set to one when the MOb is enabled (i.e. CONMOB1:0 of CANCDMOB register).
Once TXOK or RXOK is set to one (TXOK for automatic reply), the corresponding ENMOB is
reset. ENMOB is also set to zero configuring the MOb in disabled mode, applying abortion or
standby mode.
– 0 - message object disabled: MOb available for a new transmission or reception.
– 1 - message object enabled: MOb in use.
• Bit 15:6 – Reserved Bits
These bits are reserved for future use.
191
7647F–AVR–04/09
ATMEL [ ATMEL ]
