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ATMEGA48V-10AUR 参数 Datasheet PDF下载

ATMEGA48V-10AUR图片预览
型号: ATMEGA48V-10AUR
PDF下载: 下载PDF文件 查看货源
内容描述: [RISC Microcontroller, 8-Bit, FLASH, AVR RISC CPU, 10MHz, CMOS, PQFP32, 7 X 7 MM, 1 MM HEIGHT, 0.80 MM PITCH, GREEN, PLASTIC, MS-026ABA, TQFP-32]
分类和应用: 闪存微控制器
文件页数/大小: 376 页 / 4764 K
品牌: ATMEL [ ATMEL ]
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ATmega48/88/168  
Table 21-4. Status Codes for Slave Receiver Mode  
Status Code  
(TWSR)  
Prescaler Bits  
are 0  
Application Software Response  
To TWCR  
STO TWIN  
Status of the 2-wire Serial Bus  
and 2-wire Serial Interface Hard-  
ware  
To/from TWDR  
STA  
X
TWE  
A
Next Action Taken by TWI Hardware  
T
0x60  
0x68  
0x70  
0x78  
Own SLA+W has been received;  
ACK has been returned  
No TWDR action or  
0
1
0
Data byte will be received and NOT ACK will be  
returned  
No TWDR action  
X
X
0
0
1
1
1
0
Data byte will be received and ACK will be returned  
Arbitration lost in SLA+R/W as  
Master; own SLA+W has been  
received; ACK has been returned  
No TWDR action or  
Data byte will be received and NOT ACK will be  
returned  
No TWDR action  
X
X
0
0
1
1
1
0
Data byte will be received and ACK will be returned  
General call address has been  
received; ACK has been returned  
No TWDR action or  
Data byte will be received and NOT ACK will be  
returned  
No TWDR action  
X
X
0
0
1
1
1
0
Data byte will be received and ACK will be returned  
Arbitration lost in SLA+R/W as  
Master; General call address has  
been received; ACK has been  
returned  
No TWDR action or  
Data byte will be received and NOT ACK will be  
returned  
No TWDR action  
Read data byte or  
X
X
0
0
1
1
1
0
Data byte will be received and ACK will be returned  
0x80  
0x88  
Previously addressed with own  
SLA+W; data has been received;  
ACK has been returned  
Data byte will be received and NOT ACK will be  
returned  
Read data byte  
X
0
0
0
1
1
1
0
Data byte will be received and ACK will be returned  
Previously addressed with own  
SLA+W; data has been received;  
NOT ACK has been returned  
Read data byte or  
Switched to the not addressed Slave mode;  
no recognition of own SLA or GCA  
Switched to the not addressed Slave mode;  
own SLA will be recognized;  
GCA will be recognized if TWGCE = “1”  
Switched to the not addressed Slave mode;  
no recognition of own SLA or GCA;  
a START condition will be transmitted when the bus  
becomes free  
Read data byte or  
Read data byte or  
0
1
0
0
1
1
1
0
Read data byte  
1
0
0
1
1
1
0
Switched to the not addressed Slave mode;  
own SLA will be recognized;  
GCA will be recognized if TWGCE = “1”;  
a START condition will be transmitted when the bus  
becomes free  
0x90  
0x98  
Previously addressed with  
general call; data has been re-  
ceived; ACK has been returned  
Read data byte or  
X
Data byte will be received and NOT ACK will be  
returned  
Read data byte  
X
0
0
0
1
1
1
0
Data byte will be received and ACK will be returned  
Previously addressed with  
general call; data has been  
received; NOT ACK has been  
returned  
Read data byte or  
Switched to the not addressed Slave mode;  
no recognition of own SLA or GCA  
Switched to the not addressed Slave mode;  
own SLA will be recognized;  
GCA will be recognized if TWGCE = “1”  
Switched to the not addressed Slave mode;  
no recognition of own SLA or GCA;  
a START condition will be transmitted when the bus  
becomes free  
Read data byte or  
Read data byte or  
0
1
0
0
1
1
1
0
Read data byte  
No action  
1
0
1
1
Switched to the not addressed Slave mode;  
own SLA will be recognized;  
GCA will be recognized if TWGCE = “1”;  
a START condition will be transmitted when the bus  
becomes free  
0xA0  
A STOP condition or repeated  
START condition has been  
received while still addressed as  
Slave  
0
0
0
0
1
1
0
1
Switched to the not addressed Slave mode;  
no recognition of own SLA or GCA  
Switched to the not addressed Slave mode;  
own SLA will be recognized;  
GCA will be recognized if TWGCE = “1”  
Switched to the not addressed Slave mode;  
no recognition of own SLA or GCA;  
a START condition will be transmitted when the bus  
becomes free  
1
1
0
0
1
1
0
1
Switched to the not addressed Slave mode;  
own SLA will be recognized;  
GCA will be recognized if TWGCE = “1”;  
a START condition will be transmitted when the bus  
becomes free  
231  
2545M–AVR–09/07  
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