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ATMEGA48V-10AUR 参数 Datasheet PDF下载

ATMEGA48V-10AUR图片预览
型号: ATMEGA48V-10AUR
PDF下载: 下载PDF文件 查看货源
内容描述: [RISC Microcontroller, 8-Bit, FLASH, AVR RISC CPU, 10MHz, CMOS, PQFP32, 7 X 7 MM, 1 MM HEIGHT, 0.80 MM PITCH, GREEN, PLASTIC, MS-026ABA, TQFP-32]
分类和应用: 闪存微控制器
文件页数/大小: 376 页 / 4764 K
品牌: ATMEL [ ATMEL ]
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the Master to switch between Slaves, Master Transmitter mode and Master Receiver mode with-  
out losing control over the bus.  
Table 21-3. Status codes for Master Receiver Mode  
Status Code  
(TWSR)  
Prescaler Bits  
are 0  
Application Software Response  
To TWCR  
Status of the 2-wire Serial Bus  
and 2-wire Serial Interface  
Hardware  
To/from TWDR  
STA  
STO  
TWIN  
T
TWE  
A
Next Action Taken by TWI Hardware  
0x08  
0x10  
A START condition has been  
transmitted  
Load SLA+R  
0
0
1
X
SLA+R will be transmitted  
ACK or NOT ACK will be received  
A repeated START condition  
has been transmitted  
Load SLA+R or  
Load SLA+W  
0
0
0
0
1
1
X
X
SLA+R will be transmitted  
ACK or NOT ACK will be received  
SLA+W will be transmitted  
Logic will switch to Master Transmitter mode  
0x38  
0x40  
0x48  
Arbitration lost in SLA+R or  
NOT ACK bit  
No TWDR action or  
No TWDR action  
0
1
0
0
1
1
X
X
2-wire Serial Bus will be released and not addressed  
Slave mode will be entered  
A START condition will be transmitted when the bus  
becomes free  
SLA+R has been transmitted;  
ACK has been received  
No TWDR action or  
No TWDR action  
0
0
0
0
1
1
0
1
Data byte will be received and NOT ACK will be  
returned  
Data byte will be received and ACK will be returned  
SLA+R has been transmitted;  
NOT ACK has been received  
No TWDR action or  
No TWDR action or  
1
0
0
1
1
1
X
X
Repeated START will be transmitted  
STOP condition will be transmitted and TWSTO Flag  
will be reset  
No TWDR action  
1
1
1
X
STOP condition followed by a START condition will be  
transmitted and TWSTO Flag will be reset  
0x50  
0x58  
Data byte has been received;  
ACK has been returned  
Read data byte or  
Read data byte  
0
0
0
0
1
1
0
1
Data byte will be received and NOT ACK will be  
returned  
Data byte will be received and ACK will be returned  
Data byte has been received;  
NOT ACK has been returned  
Read data byte or  
Read data byte or  
1
0
0
1
1
1
X
X
Repeated START will be transmitted  
STOP condition will be transmitted and TWSTO Flag  
will be reset  
Read data byte  
1
1
1
X
STOP condition followed by a START condition will be  
transmitted and TWSTO Flag will be reset  
228  
ATmega48/88/168  
2545M–AVR–09/07  
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