欢迎访问ic37.com |
会员登录 免费注册
发布采购

ATMEGA48V-10MMHR 参数 Datasheet PDF下载

ATMEGA48V-10MMHR图片预览
型号: ATMEGA48V-10MMHR
PDF下载: 下载PDF文件 查看货源
内容描述: [RISC Microcontroller, 8-Bit, FLASH, AVR RISC CPU, 10MHz, CMOS, PQCC28, 4 X 4 MM, 1 MM HEIGHT, 0.45 MM PITCH, GREEN, PLASTIC, VQFN-28]
分类和应用: 闪存微控制器
文件页数/大小: 376 页 / 4764 K
品牌: ATMEL [ ATMEL ]
 浏览型号ATMEGA48V-10MMHR的Datasheet PDF文件第127页浏览型号ATMEGA48V-10MMHR的Datasheet PDF文件第128页浏览型号ATMEGA48V-10MMHR的Datasheet PDF文件第129页浏览型号ATMEGA48V-10MMHR的Datasheet PDF文件第130页浏览型号ATMEGA48V-10MMHR的Datasheet PDF文件第132页浏览型号ATMEGA48V-10MMHR的Datasheet PDF文件第133页浏览型号ATMEGA48V-10MMHR的Datasheet PDF文件第134页浏览型号ATMEGA48V-10MMHR的Datasheet PDF文件第135页  
ATmega48/88/168  
15.11 Register Description  
15.11.1 TCCR1A – Timer/Counter1 Control Register A  
Bit  
7
COM1A1  
R/W  
6
COM1A0  
R/W  
5
COM1B1  
R/W  
4
COM1B0  
R/W  
3
2
1
WGM11  
R/W  
0
0
WGM10  
R/W  
0
TCCR1A  
(0x80)  
Read/Write  
Initial Value  
R
0
R
0
0
0
0
0
• Bit 7:6 – COM1A1:0: Compare Output Mode for Channel A  
• Bit 5:4 – COM1B1:0: Compare Output Mode for Channel B  
The COM1A1:0 and COM1B1:0 control the Output Compare pins (OC1A and OC1B respec-  
tively) behavior. If one or both of the COM1A1:0 bits are written to one, the OC1A output  
overrides the normal port functionality of the I/O pin it is connected to. If one or both of the  
COM1B1:0 bit are written to one, the OC1B output overrides the normal port functionality of the  
I/O pin it is connected to. However, note that the Data Direction Register (DDR) bit correspond-  
ing to the OC1A or OC1B pin must be set in order to enable the output driver.  
When the OC1A or OC1B is connected to the pin, the function of the COM1x1:0 bits is depen-  
dent of the WGM13:0 bits setting. Table 15-1 shows the COM1x1:0 bit functionality when the  
WGM13:0 bits are set to a Normal or a CTC mode (non-PWM).  
Table 15-1. Compare Output Mode, non-PWM  
COM1A1/COM1B1  
COM1A0/COM1B0  
Description  
0
0
0
1
Normal port operation, OC1A/OC1B disconnected.  
Toggle OC1A/OC1B on Compare Match.  
Clear OC1A/OC1B on Compare Match (Set output to  
low level).  
1
1
0
1
Set OC1A/OC1B on Compare Match (Set output to  
high level).  
Table 15-2 shows the COM1x1:0 bit functionality when the WGM13:0 bits are set to the fast  
PWM mode.  
Table 15-2. Compare Output Mode, Fast PWM(1)  
COM1A1/COM1B1  
COM1A0/COM1B0  
Description  
0
0
Normal port operation, OC1A/OC1B disconnected.  
WGM13:0 = 14 or 15: Toggle OC1A on Compare  
Match, OC1B disconnected (normal port operation).  
For all other WGM1 settings, normal port operation,  
OC1A/OC1B disconnected.  
0
1
Clear OC1A/OC1B on Compare Match, set  
OC1A/OC1B at BOTTOM (non-inverting mode)  
1
1
0
1
Set OC1A/OC1B on Compare Match, clear  
OC1A/OC1B at BOTTOM (invertiong mode)  
131  
2545M–AVR–09/07  
 复制成功!