欢迎访问ic37.com |
会员登录 免费注册
发布采购

ATMEGA8-16AI 参数 Datasheet PDF下载

ATMEGA8-16AI图片预览
型号: ATMEGA8-16AI
PDF下载: 下载PDF文件 查看货源
内容描述: 位的AVR微控制器8K字节在 - 系统内可编程Flash [-bit AVR Microcontroller with 8K Bytes In- System Programmable Flash]
分类和应用: 微控制器
文件页数/大小: 303 页 / 5122 K
品牌: ATMEL [ ATMEL ]
 浏览型号ATMEGA8-16AI的Datasheet PDF文件第63页浏览型号ATMEGA8-16AI的Datasheet PDF文件第64页浏览型号ATMEGA8-16AI的Datasheet PDF文件第65页浏览型号ATMEGA8-16AI的Datasheet PDF文件第66页浏览型号ATMEGA8-16AI的Datasheet PDF文件第68页浏览型号ATMEGA8-16AI的Datasheet PDF文件第69页浏览型号ATMEGA8-16AI的Datasheet PDF文件第70页浏览型号ATMEGA8-16AI的Datasheet PDF文件第71页  
ATmega8(L)  
8-bit Timer/Counter0 Timer/Counter0 is a general purpose, single channel, 8-bit Timer/Counter module. The  
main features are:  
Single Channel Counter  
Frequency Generator  
External Event Counter  
10-bit Clock Prescaler  
Overview  
A simplified block diagram of the 8-bit Timer/Counter is shown in Figure 26. For the  
actual placement of I/O pins, refer to “Pin Configurations” on page 2. CPU accessible  
I/O Registers, including I/O bits and I/O pins, are shown in bold. The device-specific I/O  
Register and bit locations are listed in the “8-bit Timer/Counter Register Description” on  
page 70.  
Figure 26. 8-bit Timer/Counter Block Diagram  
TCCRn  
TOVn  
(Int.Req.)  
count  
Control Logic  
Clock Select  
clkTn  
Edge  
Detector  
Tn  
Timer/Counter  
TCNTn  
( From Prescaler )  
=
0xFF  
Registers  
The Timer/Counter (TCNT0) is an 8-bit register. Interrupt request (abbreviated to  
Int. Req. in the figure) signals are all visible in the Timer Interrupt Flag Register (TIFR).  
All interrupts are individually masked with the Timer Interrupt Mask Register (TIMSK).  
TIFR and TIMSK are not shown in the figure since these registers are shared by other  
timer units.  
The Timer/Counter can be clocked internally or via the prescaler, or by an external clock  
source on the T0 pin. The Clock Select logic block controls which clock source and edge  
the Timer/Counter uses to increment its value. The Timer/Counter is inactive when no  
clock source is selected. The output from the clock select logic is referred to as the timer  
clock (clkT0).  
Definitions  
Many register and bit references in this document are written in general form. A lower  
case “n” replaces the Timer/Counter number, in this case 0. However, when using the  
register or bit defines in a program, the precise form must be used i.e. TCNT0 for  
accessing Timer/Counter0 counter value and so on.  
The definitions in Table 33 are also used extensively throughout this datasheet.  
Table 33. Definitions  
BOTTOM The counter reaches the BOTTOM when it becomes 0x00  
MAX  
The counter reaches its MAXimum when it becomes 0xFF (decimal 255)  
67  
2486M–AVR–12/03  
 复制成功!