ATmega8(L)
Memory
Programming
Program And Data The ATmega8 provides six Lock Bits which can be left unprogrammed (“1”) or can be pro-
grammed (“0”) to obtain the additional features listed in Table 86. The Lock Bits can only be
erased to “1” with the Chip Erase command.
Memory Lock Bits
Table 85. Lock Bit Byte
Lock Bit Byte
Bit No.
Description
–
Default Value(1)
7
6
5
4
3
2
1
0
1 (unprogrammed)
1 (unprogrammed)
1 (unprogrammed)
1 (unprogrammed)
1 (unprogrammed)
1 (unprogrammed)
1 (unprogrammed)
1 (unprogrammed)
–
BLB12
Boot lock bit
Boot lock bit
Boot lock bit
Boot lock bit
Lock bit
BLB11
BLB02
BLB01
LB2
LB1
Lock bit
Note:
Table 86. Lock Bit Protection Modes(2)
Memory Lock Bits Protection Type
1. “1” means unprogrammed, “0” means programmed
LB Mode
LB2
LB1
1
1
1
No memory lock features enabled
Further programming of the Flash and EEPROM is
disabled in Parallel and Serial Programming mode. The
Fuse Bits are locked in both Serial and Parallel
Programming mode (1)
2
1
0
0
0
Further programming and verification of the Flash and
EEPROM is disabled in parallel and Serial Programming
mode. The Fuse Bits are locked in both Serial and Parallel
Programming modes (1)
3
BLB0 Mode BLB02 BLB01
No restrictions for SPM or LPM accessing the Application
section
1
2
1
1
1
0
SPM is not allowed to write to the Application section
SPM is not allowed to write to the Application section, and
LPM executing from the Boot Loader section is not
allowed to read from the Application section. If Interrupt
Vectors are placed in the Boot Loader section, interrupts
are disabled while executing from the Application section
3
4
0
0
0
1
LPM executing from the Boot Loader section is not
allowed to read from the Application section. If Interrupt
Vectors are placed in the Boot Loader section, interrupts
are disabled while executing from the Application section
215
2486AA–AVR–02/2013
ATMEL [ ATMEL ]
