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ATMEGA8L-8MUR 参数 Datasheet PDF下载

ATMEGA8L-8MUR图片预览
型号: ATMEGA8L-8MUR
PDF下载: 下载PDF文件 查看货源
内容描述: 8位爱特梅尔带有8K字节的系统内可编程闪存 [8-bit Atmel with 8KBytes In-System PRogrammable Flash]
分类和应用: 闪存微控制器和处理器外围集成电路异步传输模式PCATM时钟
文件页数/大小: 331 页 / 6705 K
品牌: ATMEL [ ATMEL ]
 浏览型号ATMEGA8L-8MUR的Datasheet PDF文件第97页浏览型号ATMEGA8L-8MUR的Datasheet PDF文件第98页浏览型号ATMEGA8L-8MUR的Datasheet PDF文件第99页浏览型号ATMEGA8L-8MUR的Datasheet PDF文件第100页浏览型号ATMEGA8L-8MUR的Datasheet PDF文件第102页浏览型号ATMEGA8L-8MUR的Datasheet PDF文件第103页浏览型号ATMEGA8L-8MUR的Datasheet PDF文件第104页浏览型号ATMEGA8L-8MUR的Datasheet PDF文件第105页  
ATmega8(L)  
Timer/Counter  
Interrupt Flag Register  
– TIFR(1)  
Bit  
7
OCF2  
R/W  
0
6
TOV2  
R/W  
0
5
4
OCF1A  
R/W  
0
3
OCF1B  
R/W  
0
2
TOV1  
R/W  
0
1
0
ICF1  
R/W  
0
TOV0  
R/W  
0
TIFR  
Read/Write  
Initial Value  
R
0
Note:  
1. This register contains flag bits for several Timer/Counters, but only Timer1 bits are described  
in this section. The remaining bits are described in their respective timer sections  
• Bit 5 – ICF1: Timer/Counter1, Input Capture Flag  
This flag is set when a capture event occurs on the ICP1 pin. When the Input Capture Register  
(ICR1) is set by the WGM13:0 to be used as the TOP value, the ICF1 Flag is set when the coun-  
ter reaches the TOP value.  
ICF1 is automatically cleared when the Input Capture Interrupt Vector is executed. Alternatively,  
ICF1 can be cleared by writing a logic one to its bit location.  
• Bit 4 – OCF1A: Timer/Counter1, Output Compare A Match Flag  
This flag is set in the timer clock cycle after the counter (TCNT1) value matches the Output  
Compare Register A (OCR1A).  
Note that a Forced Output Compare (FOC1A) strobe will not set the OCF1A Flag.  
OCF1A is automatically cleared when the Output Compare Match A Interrupt Vector is exe-  
cuted. Alternatively, OCF1A can be cleared by writing a logic one to its bit location.  
• Bit 3 – OCF1B: Timer/Counter1, Output Compare B Match Flag  
This flag is set in the timer clock cycle after the counter (TCNT1) value matches the Output  
Compare Register B (OCR1B).  
Note that a Forced Output Compare (FOC1B) strobe will not set the OCF1B Flag.  
OCF1B is automatically cleared when the Output Compare Match B Interrupt Vector is exe-  
cuted. Alternatively, OCF1B can be cleared by writing a logic one to its bit location.  
• Bit 2 – TOV1: Timer/Counter1, Overflow Flag  
The setting of this flag is dependent of the WGM13:0 bits setting. In normal and CTC modes, the  
TOV1 Flag is set when the timer overflows. Refer to Table 39 on page 97 for the TOV1 Flag  
behavior when using another WGM13:0 bit setting.  
TOV1 is automatically cleared when the Timer/Counter1 Overflow Interrupt Vector is executed.  
Alternatively, TOV1 can be cleared by writing a logic one to its bit location.  
101  
2486AA–AVR–02/2013  
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