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ATMEGA8L-8MUR 参数 Datasheet PDF下载

ATMEGA8L-8MUR图片预览
型号: ATMEGA8L-8MUR
PDF下载: 下载PDF文件 查看货源
内容描述: 8位爱特梅尔带有8K字节的系统内可编程闪存 [8-bit Atmel with 8KBytes In-System PRogrammable Flash]
分类和应用: 闪存微控制器和处理器外围集成电路异步传输模式PCATM时钟
文件页数/大小: 331 页 / 6705 K
品牌: ATMEL [ ATMEL ]
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ATmega8(L)  
Table 38 shows the COM1x1:0 bit functionality when the WGM13:0 bits are set to the phase cor-  
rect or the phase and frequency correct, PWM mode.  
Table 38. Compare Output Mode, Phase Correct and Phase and Frequency Correct PWM(1)  
COM1A1/  
COM1B1  
COM1A0/  
COM1B0  
Description  
0
0
0
1
Normal port operation, OC1A/OC1B disconnected.  
WGM13:0 = 9 or 14: Toggle OC1A on Compare Match, OC1B  
disconnected (normal port operation). For all other WGM1  
settings, normal port operation, OC1A/OC1B disconnected.  
1
1
0
1
Clear OC1A/OC1B on Compare Match when up-counting. Set  
OC1A/OC1B on Compare Match when downcounting.  
Set OC1A/OC1B on Compare Match when up-counting. Clear  
OC1A/OC1B on Compare Match when downcounting.  
Note:  
1. A special case occurs when OCR1A/OCR1B equals TOP and COM1A1/COM1B1 is set. See  
“Phase Correct PWM Mode” on page 90 for more details  
• Bit 3 – FOC1A: Force Output Compare for channel A  
• Bit 2 – FOC1B: Force Output Compare for channel B  
The FOC1A/FOC1B bits are only active when the WGM13:0 bits specifies a non-PWM mode.  
However, for ensuring compatibility with future devices, these bits must be set to zero when  
TCCR1A is written when operating in a PWM mode. When writing a logical one to the  
FOC1A/FOC1B bit, an immediate Compare Match is forced on the waveform generation unit.  
The OC1A/OC1B output is changed according to its COM1x1:0 bits setting. Note that the  
FOC1A/FOC1B bits are implemented as strobes. Therefore it is the value present in the  
COM1x1:0 bits that determine the effect of the forced compare.  
A FOC1A/FOC1B strobe will not generate any interrupt nor will it clear the timer in Clear Timer  
on Compare Match (CTC) mode using OCR1A as TOP.  
The FOC1A/FOC1B bits are always read as zero.  
• Bit 1:0 – WGM11:0: Waveform Generation Mode  
Combined with the WGM13:2 bits found in the TCCR1B Register, these bits control the counting  
sequence of the counter, the source for maximum (TOP) counter value, and what type of wave-  
form generation to be used, see Table 39. Modes of operation supported by the Timer/Counter  
unit are: Normal mode (counter), Clear Timer on Compare Match (CTC) mode, and three types  
of Pulse Width Modulation (PWM) modes (see “Modes of Operation” on page 87).  
Table 39. Waveform Generation Mode Bit Description  
WGM12  
(CTC1)  
WGM11  
WGM10  
Timer/Counter Mode of  
Update of  
OCR1x  
TOV1 Flag  
Set on  
Mode WGM13  
(PWM11) (PWM10) Operation(1)  
TOP  
0
1
2
3
4
5
6
0
0
0
0
0
0
0
0
0
0
0
1
1
1
0
0
1
1
0
0
1
0
1
0
1
0
1
0
Normal  
0xFFFF Immediate  
MAX  
PWM, Phase Correct, 8-bit  
PWM, Phase Correct, 9-bit  
PWM, Phase Correct, 10-bit  
CTC  
0x00FF  
0x01FF  
0x03FF  
TOP  
TOP  
TOP  
BOTTOM  
BOTTOM  
BOTTOM  
MAX  
OCR1A Immediate  
Fast PWM, 8-bit  
0x00FF  
0x01FF  
BOTTOM  
BOTTOM  
TOP  
Fast PWM, 9-bit  
TOP  
97  
2486AA–AVR–02/2013  
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