ATmega32(L)
When OC0 is connected to the pin, the function of the COM01:0 bits depends on the
WGM01:0 bit setting. Table 39 shows the COM01:0 bit functionality when the WGM01:0
bits are set to a normal or CTC mode (non-PWM).
Table 39. Compare Output Mode, non-PWM Mode
COM01
COM00
Description
0
0
1
1
0
1
0
1
Normal port operation, OC0 disconnected.
Toggle OC0 on compare match
Clear OC0 on compare match
Set OC0 on compare match
Table 40 shows the COM01:0 bit functionality when the WGM01:0 bits are set to fast
PWM mode.
Table 40. Compare Output Mode, Fast PWM Mode(1)
COM01
COM00
Description
0
0
1
0
1
0
Normal port operation, OC0 disconnected.
Reserved
Clear OC0 on compare match, set OC0 at BOTTOM,
(nin-inverting mode)
1
1
Set OC0 on compare match, clear OC0 at BOTTOM,
(inverting mode)
Note:
1. A special case occurs when OCR0 equals TOP and COM01 is set. In this case, the
compare match is ignored, but the set or clear is done at BOTTOM. See “Fast PWM
Mode” on page 75 for more details.
Table 41 shows the COM01:0 bit functionality when the WGM01:0 bits are set to phase
correct PWM mode.
Table 41. Compare Output Mode, Phase Correct PWM Mode(1)
COM01 COM00 Description
0
0
1
0
1
0
Normal port operation, OC0 disconnected.
Reserved
Clear OC0 on compare match when up-counting. Set OC0 on compare
match when downcounting.
1
1
Set OC0 on compare match when up-counting. Clear OC0 on compare
match when downcounting.
Note:
1. A special case occurs when OCR0 equals TOP and COM01 is set. In this case, the
compare match is ignored, but the set or clear is done at TOP. See “Phase Correct
PWM Mode” on page 76 for more details.
81
2503J–AVR–10/06
ATMEL [ ATMEL ]
