Memory
Programming
Program And Data
Memory Lock Bits
The ATmega32 provides six Lock bits which can be left unprogrammed (“1”) or can be
programmed (“0”) to obtain the additional features listed in Table 103. The Lock bits can
only be erased to “1” with the Chip Erase command.
Table 102. Lock Bit Byte(1)
Lock Bit Byte
Bit No.
Description
–
Default Value
7
6
5
4
3
2
1
0
1 (unprogrammed)
1 (unprogrammed)
1 (unprogrammed)
1 (unprogrammed)
1 (unprogrammed)
1 (unprogrammed)
1 (unprogrammed)
1 (unprogrammed)
–
BLB12
Boot Lock bit
Boot Lock bit
Boot Lock bit
Boot Lock bit
Lock bit
BLB11
BLB02
BLB01
LB2
LB1
Lock bit
Note:
1. “1” means unprogrammed, “0” means programmed
Table 103. Lock Bit Protection Modes
Memory Lock Bits(2)
Protection Type
LB Mode
LB2
LB1
1
2
1
1
No memory lock features enabled.
Further programming of the Flash and EEPROM is
disabled in Parallel and SPI/JTAG Serial Programming
mode. The Fuse bits are locked in both Serial and Parallel
Programming mode.(1)
1
0
0
0
Further programming and verification of the Flash and
EEPROM is disabled in Parallel and SPI/JTAG Serial
Programming mode. The Fuse bits are locked in both
Serial and Parallel Programming mode.(1)
3
BLB0 Mode BLB02 BLB01
No restrictions for SPM or LPM accessing the Application
section.
1
2
1
1
1
0
SPM is not allowed to write to the Application section.
SPM is not allowed to write to the Application section, and
LPM executing from the Boot Loader section is not
allowed to read from the Application section. If interrupt
vectors are placed in the Boot Loader section, interrupts
are disabled while executing from the Application section.
3
4
0
0
0
1
LPM executing from the Boot Loader section is not
allowed to read from the Application section. If interrupt
vectors are placed in the Boot Loader section, interrupts
are disabled while executing from the Application section.
BLB1 Mode BLB12 BLB11
256
ATmega32(L)
2503J–AVR–10/06
ATMEL [ ATMEL ]
