• Bits 1, 0 – ACIS1, ACIS0: Analog Comparator Interrupt Mode Select
These bits determine which comparator events that trigger the Analog Comparator inter-
rupt. The different settings are shown in Table 79.
Table 79. ACIS1/ACIS0 Settings
ACIS1
ACIS0
Interrupt Mode
0
0
1
1
0
1
0
1
Comparator Interrupt on Output Toggle
Reserved
Comparator Interrupt on Falling Output Edge
Comparator Interrupt on Rising Output Edge
When changing the ACIS1/ACIS0 bits, the Analog Comparator Interrupt must be dis-
abled by clearing its Interrupt Enable bit in the ACSR Register. Otherwise an interrupt
can occur when the bits are changed.
Analog Comparator
Multiplexed Input
It is possible to select any of the ADC7..0 pins to replace the negative input to the Ana-
log Comparator. The ADC multiplexer is used to select this input, and consequently, the
ADC must be switched off to utilize this feature. If the Analog Comparator Multiplexer
Enable bit (ACME in SFIOR) is set and the ADC is switched off (ADEN in ADCSRA is
zero), MUX2..0 in ADMUX select the input pin to replace the negative input to the Ana-
log Comparator, as shown in Table 80. If ACME is cleared or ADEN is set, AIN1 is
applied to the negative input to the Analog Comparator.
Table 80. Analog Comparator Multiplexed Input
ACME
ADEN
MUX2..0
xxx
Analog Comparator Negative Input
0
1
1
1
1
1
1
1
1
1
x
1
0
0
0
0
0
0
0
0
AIN1
xxx
AIN1
000
ADC0
ADC1
ADC2
ADC3
ADC4
ADC5
ADC6
ADC7
001
010
011
100
101
110
111
200
ATmega32(L)
2503J–AVR–10/06
ATMEL [ ATMEL ]
