ATmega640/1280/1281/2560/2561
Timer/Counter Control
Register B – TCCR2B
Bit
7
FOC2A
W
6
FOC2B
W
5
–
4
–
3
WGM22
R/W
0
2
CS22
R/W
0
1
CS21
R/W
0
0
CS20
R/W
0
TCCR2B
Read/Write
Initial Value
R
0
R
0
0
0
• Bit 7 – FOC2A: Force Output Compare A
The FOC2A bit is only active when the WGM bits specify a non-PWM mode.
However, for ensuring compatibility with future devices, this bit must be set to zero when
TCCR2B is written when operating in PWM mode. When writing a logical one to the
FOC2A bit, an immediate Compare Match is forced on the Waveform Generation unit.
The OC2A output is changed according to its COM2A1:0 bits setting. Note that the
FOC2A bit is implemented as a strobe. Therefore it is the value present in the
COM2A1:0 bits that determines the effect of the forced compare.
A FOC2A strobe will not generate any interrupt, nor will it clear the timer in CTC mode
using OCR2A as TOP.
The FOC2A bit is always read as zero.
• Bit 6 – FOC2B: Force Output Compare B
The FOC2B bit is only active when the WGM bits specify a non-PWM mode.
However, for ensuring compatibility with future devices, this bit must be set to zero when
TCCR2B is written when operating in PWM mode. When writing a logical one to the
FOC2B bit, an immediate Compare Match is forced on the Waveform Generation unit.
The OC2B output is changed according to its COM2B1:0 bits setting. Note that the
FOC2B bit is implemented as a strobe. Therefore it is the value present in the
COM2B1:0 bits that determines the effect of the forced compare.
A FOC2B strobe will not generate any interrupt, nor will it clear the timer in CTC mode
using OCR2B as TOP.
The FOC2B bit is always read as zero.
• Bits 5:4 – Res: Reserved Bits
These bits are reserved bits and will always read as zero.
• Bit 3 – WGM22: Waveform Generation Mode
See the description in the “Timer/Counter Control Register A – TCCR2A” on page 184.
• Bit 2:0 – CS22:0: Clock Select
The three Clock Select bits select the clock source to be used by the Timer/Counter, see
Table 92.
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2549A–AVR–03/05