欢迎访问ic37.com |
会员登录 免费注册
发布采购

ATMEGA2560 参数 Datasheet PDF下载

ATMEGA2560图片预览
型号: ATMEGA2560
PDF下载: 下载PDF文件 查看货源
内容描述: 8位微控制器与256K字节的系统内可编程闪存 [8- BIT Microcontroller with 256K Bytes In-System Programmable Flash]
分类和应用: 闪存微控制器
文件页数/大小: 407 页 / 2985 K
品牌: ATMEL [ ATMEL ]
 浏览型号ATMEGA2560的Datasheet PDF文件第164页浏览型号ATMEGA2560的Datasheet PDF文件第165页浏览型号ATMEGA2560的Datasheet PDF文件第166页浏览型号ATMEGA2560的Datasheet PDF文件第167页浏览型号ATMEGA2560的Datasheet PDF文件第169页浏览型号ATMEGA2560的Datasheet PDF文件第170页浏览型号ATMEGA2560的Datasheet PDF文件第171页浏览型号ATMEGA2560的Datasheet PDF文件第172页  
ICFn is automatically cleared when the Input Capture Interrupt Vector is executed. Alter-  
natively, ICFn can be cleared by writing a logic one to its bit location.  
• Bit 3– OCFnC: Timer/Countern, Output Compare C Match Flag  
This flag is set in the timer clock cycle after the counter (TCNTn) value matches the Out-  
put Compare Register C (OCRnC).  
Note that a Forced Output Compare (FOCnC) strobe will not set the OCFnC Flag.  
OCFnC is automatically cleared when the Output Compare Match C Interrupt Vector is  
executed. Alternatively, OCFnC can be cleared by writing a logic one to its bit location.  
• Bit 2 – OCFnB: Timer/Counter1, Output Compare B Match Flag  
This flag is set in the timer clock cycle after the counter (TCNTn) value matches the Out-  
put Compare Register B (OCRnB).  
Note that a Forced Output Compare (FOCnB) strobe will not set the OCFnB Flag.  
OCFnB is automatically cleared when the Output Compare Match B Interrupt Vector is  
executed. Alternatively, OCFnB can be cleared by writing a logic one to its bit location.  
• Bit 1 – OCF1A: Timer/Counter1, Output Compare A Match Flag  
This flag is set in the timer clock cycle after the counter (TCNTn value matches the Out-  
put Compare Register A (OCRnA).  
Note that a Forced Output Compare (FOCnA) strobe will not set the OCFnA Flag.  
OCFnA is automatically cleared when the Output Compare Match A Interrupt Vector is  
executed. Alternatively, OCFnA can be cleared by writing a logic one to its bit location.  
• Bit 0 – TOVn: Timer/Countern, Overflow Flag  
The setting of this flag is dependent of the WGMn3:0 bits setting. In Normal and CTC  
modes, the TOVn Flag is set when the timer overflows. Refer to Table 82 on page 160  
for the TOVn Flag behavior when using another WGMn3:0 bit setting.  
TOVn is automatically cleared when the Timer/Countern Overflow Interrupt Vector is  
executed. Alternatively, TOVn can be cleared by writing a logic one to its bit location.  
168  
ATmega640/1280/1281/2560/2561  
2549A–AVR–03/05  
 复制成功!