ATmega16(L)
16-bit Timer/Counter1 The 16-bit Timer/Counter unit allows accurate program execution timing (event man-
agement), wave generation, and signal timing measurement. The main features are:
• True 16-bit Design (i.e., Allows 16-bit PWM)
• Two Independent Output Compare Units
• Double Buffered Output Compare Registers
• One Input Capture Unit
• Input Capture Noise Canceler
• Clear Timer on Compare Match (Auto Reload)
• Glitch-free, Phase Correct Pulse Width Modulator (PWM)
• Variable PWM Period
• Frequency Generator
• External Event Counter
• Four Independent Interrupt Sources (TOV1, OCF1A, OCF1B, and ICF1)
Overview
Most register and bit references in this document are written in general form. A lower
case “n” replaces the Timer/Counter number, and a lower case “x” replaces the output
compare unit channel. However, when using the register or bit defines in a program, the
precise form must be used (i.e., TCNT1 for accessing Timer/Counter1 counter value
and so on). The physical I/O Register and bit locations for ATmega16 are listed in the
“16-bit Timer/Counter Register Description” on page 104.
A simplified block diagram of the 16-bit Timer/Counter is shown in Figure 40. CPU
accessible I/O Registers, including I/O bits and I/O pins, are shown in bold.
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2466E–AVR–10/02
ATMEL [ ATMEL ]
