Alternate Port Functions Most port pins have alternate functions in addition to being General Digital I/Os. Figure
26 shows how the port pin control signals from the simplified Figure 23 can be overrid-
den by alternate functions. The overriding signals may not be present in all port pins, but
the figure serves as a generic description applicable to all port pins in the AVR micro-
controller family.
Figure 26. Alternate Port Functions(1)
PUOExn
PUOVxn
1
PUD
0
DDOExn
DDOVxn
1
Q
D
0
DDxn
Q CLR
WDx
RDx
PVOExn
PVOVxn
RESET
1
0
Pxn
Q
D
PORTxn
Q CLR
DIEOExn
DIEOVxn
SLEEP
WPx
RRx
RESET
1
0
SYNCHRONIZER
RPx
SET
D
Q
D
L
Q
Q
PINxn
CLR Q
CLR
clk I/O
DIxn
AIOxn
PUOExn: Pxn PULL-UP OVERRIDE ENABLE
PUOVxn: Pxn PULL-UP OVERRIDE VALUE
DDOExn: Pxn DATA DIRECTION OVERRIDE ENABLE
DDOVxn: Pxn DATA DIRECTION OVERRIDE VALUE
PVOExn: Pxn PORT VALUE OVERRIDE ENABLE
PVOVxn: Pxn PORT VALUE OVERRIDE VALUE
PUD:
WDx:
RDx:
RRx:
WPx:
RPx:
PULLUP DISABLE
WRITE DDRx
READ DDRx
READ PORTx REGISTER
WRITE PORTx
READ PORTx PIN
DIEOExn: Pxn DIGITAL INPUT-ENABLE OVERRIDE ENABLE
DIEOVxn: Pxn DIGITAL INPUT-ENABLE OVERRIDE VALUE
clkI/O
DIxn:
AIOxn:
:
I/O CLOCK
DIGITAL INPUT PIN n ON PORTx
ANALOG INPUT/OUTPUT PIN n ON PORTx
SLEEP:
SLEEP CONTROL
Note:
1. WPx, WDx, RRx, RPx, and RDx are common to all pins within the same port. clkI/O
SLEEP, and PUD are common to all ports. All other signals are unique for each pin.
,
Table 21 summarizes the function of the overriding signals. The pin and port indexes
from Figure 26 are not shown in the succeeding tables. The overriding signals are gen-
erated internally in the modules having the alternate function.
52
ATmega16(L)
2466E–AVR–10/02
ATMEL [ ATMEL ]
