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ATMEGA16U2-MUR 参数 Datasheet PDF下载

ATMEGA16U2-MUR图片预览
型号: ATMEGA16U2-MUR
PDF下载: 下载PDF文件 查看货源
内容描述: 8位微控制器具有ISP功能的Flash 8/16 / 32K Butes [8-bit Microcontroller with 8/16/32K Butes of ISP Flash]
分类和应用: 微控制器异步传输模式PCATM
文件页数/大小: 310 页 / 4432 K
品牌: ATMEL [ ATMEL ]
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ATmega8U2/16U2/32U2  
that remains enabled. This allows the device to stay attached to the bus during and after the  
reset, while enhancing firmware reliability.  
Figure 10-7. USB Reset During Operation  
CC  
End of Reset  
tUSBRSTMIN  
DP  
USB Traffic  
USB Traffic  
DM  
10.3 Internal Voltage Reference  
ATmega8U2/16U2/32U2 features an internal bandgap reference. This reference is used for  
Brown-out Detection, and it can be used as an input to the Analog Comparator.  
10.3.1  
Voltage Reference Enable Signals and Start-up Time  
The voltage reference has a start-up time that may influence the way it should be used. The  
start-up time is given in “System and Reset Characteristics” on page 267. To save power, the  
reference is not always turned on. The reference is on during the following situations:  
1. When the BOD is enabled (by programming the BODLEVEL [2..0] Fuse).  
2. When the bandgap reference is connected to the Analog Comparator (by setting the  
ACBG bit in ACSR).  
Thus, when the BOD is not enabled, after setting the ACBG bit, the user must always allow the  
reference to start up before the output from the Analog Comparator is used. To reduce power  
consumption in Power-down mode, the user can avoid the three conditions above to ensure that  
the reference is turned off before entering Power-down mode.  
10.4 Watchdog Timer  
10.4.1  
Features  
Clocked from separate On-chip Oscillator  
3 Operating modes  
– Interrupt  
– System Reset  
– Interrupt and System ResetSelectable Time-out period from 16ms to 8s  
Possible Hardware fuse Watchdog always on (WDTON) for fail-safe mode  
Early warning after one Time-Out period reached, programmable Reset (see operating modes)  
after 2 Time-Out periods reached.  
10.4.2  
Overview  
ATmega8U2/16U2/32U2 has an Enhanced Watchdog Timer (WDT). The WDT is a timer count-  
ing cycles of a separate on-chip 128 kHz oscillator. The WDT gives a early warning interrupt  
51  
7799D–AVR–11/10  
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