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ATMEGA16U2-MUR 参数 Datasheet PDF下载

ATMEGA16U2-MUR图片预览
型号: ATMEGA16U2-MUR
PDF下载: 下载PDF文件 查看货源
内容描述: 8位微控制器具有ISP功能的Flash 8/16 / 32K Butes [8-bit Microcontroller with 8/16/32K Butes of ISP Flash]
分类和应用: 微控制器异步传输模式PCATM
文件页数/大小: 310 页 / 4432 K
品牌: ATMEL [ ATMEL ]
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ATmega8U2/16U2/32U2  
Figure 10-1. Reset Logic  
DATA BUS  
MCU Status  
Register (MCUSR)  
Power-on Reset  
Circuit  
Brown-out  
Reset Circuit  
BODLEVEL [2..0]  
Pull-up Resistor  
SPIKE  
FILTER  
USB Device  
Reset Detection  
Watchdog  
Oscillator  
Delay Counters  
TIMEOUT  
Clock  
Generator  
CK  
CKSEL[3:0]  
SUT[1:0]  
10.2.1  
Power-on Reset  
A Power-on Reset (POR) pulse is generated by an On-chip detection circuit. The detection level  
is defined in “System and Reset Characteristics” on page 267. The POR is activated whenever  
VCC is below the detection level. The POR circuit can be used to trigger the start-up Reset, as  
well as to detect a failure in supply voltage.  
A Power-on Reset (POR) circuit ensures that the device is reset from Power-on. Reaching the  
Power-on Reset threshold voltage invokes the delay counter, which determines how long the  
device is kept in RESET after VCC rise. The RESET signal is activated again, without any delay,  
when VCC decreases below the detection level.  
Figure 10-2. MCU Start-up, RESET Tied to VCC  
VPOT  
VCC  
VRST  
RESET  
tTOUT  
TIME-OUT  
INTERNAL  
RESET  
48  
7799D–AVR–11/10