ATmega8U2/16U2/32U2
Figure 10-3. MCU Start-up, RESET Extended Externally
VPOT
VCC
VRST
RESET
tTOUT
TIME-OUT
INTERNAL
RESET
10.2.2
External Reset
An External Reset is generated by a low level on the RESET pin. Reset pulses longer than the
minimum pulse width (see “System and Reset Characteristics” on page 267) will generate a
reset, even if the clock is not running. Shorter pulses are not guaranteed to generate a reset.
When the applied signal reaches the Reset Threshold Voltage – VRST – on its positive edge, the
delay counter starts the MCU after the Time-out period – tTOUT – has expired.
Figure 10-4. External Reset During Operation
CC
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