ATmega8U2/16U2/32U2
2. Overview
The ATmega8U2/16U2/32U2 is a low-power CMOS 8-bit microcontroller based on the AVR enhanced RISC architecture.
By executing powerful instructions in a single clock cycle, the ATmega8U2/16U2/32U2 achieves throughputs approaching
1 MIPS per MHz allowing the system designer to optimize power consumption versus processing speed.
2.1
Block Diagram
Block Diagram
Figure 2-1.
PD7 - PD0
PC7 - PC0
PB7 - PB0
PORTD DRIVERS
PORTC DRIVERS
PORTB DRIVERS
ANALOG
COMPARATOR
DATA REGISTER
PORTD
DATA DIR.
REG. PORTD
DATA REGISTER
PORTC
DATA DIR.
REG. PORTC
DATA REGISTER
PORTB
DATA DIR.
REG. PORTB
8-BIT DA TA BUS
VCC
POR - BOD
RESET
GND
INTERNAL
OSCILLATOR
CALIB. OSC
Debug-Wire
PROGRAM
COUNTER
STACK
POINTER
WATCHDOG
TIMER
OSCILLATOR
ON-CHIP DEBUG
PROGRAM
FLASH
SRAM
MCU CONTROL
REGISTER
TIMING AND
CONTROL
PROGRAMMING
LOGIC
INSTRUCTION
REGISTER
GENERAL
PURPOSE
REGISTERS
X
Y
Z
TIMER/
COUNTERS
UVcc
INTERRUPT
UNIT
ON-CHIP
3.3V
REGULATOR
1uF
INSTRUCTION
DECODER
RESET
XTAL1
XTAL2
7799E–AVR–09/2012
+
-
UCap
CONTROL
LINES
ALU
EEPROM
PLL
STATUS
REGISTER
USB
D+/SCK
D-/SDATA
USART1
SPI
PS/2
The AVR core combines a rich instruction set with 32 general purpose working registers. All the
32 registers are directly connected to the Arithmetic Logic Unit (ALU), allowing two independent
registers to be accessed in one single instruction executed in one clock cycle. The resulting
3
ATMEL [ ATMEL CORPORATION ]
