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ATMEGA16U2-MUR 参数 Datasheet PDF下载

ATMEGA16U2-MUR图片预览
型号: ATMEGA16U2-MUR
PDF下载: 下载PDF文件 查看货源
内容描述: 8位微控制器具有ISP功能的Flash 8/16 / 32K Butes [8-bit Microcontroller with 8/16/32K Butes of ISP Flash]
分类和应用: 微控制器异步传输模式PCATM
文件页数/大小: 310 页 / 4432 K
品牌: ATMEL [ ATMEL ]
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ATmega8U2/16U2/32U2  
Table 15-9. Clock Select Bit Description (Continued)  
CS02  
CS01  
CS00  
Description  
1
1
1
1
0
0
1
1
0
1
0
1
clkI/O/256 (From prescaler)  
clkI/O/1024 (From prescaler)  
External clock source on T0 pin. Clock on falling edge.  
External clock source on T0 pin. Clock on rising edge.  
If external pin modes are used for the Timer/Counter0, transitions on the T0 pin will clock the  
counter even if the pin is configured as an output. This feature allows software control of the  
counting.  
15.9.3  
TCNT0 – Timer/Counter Register  
Bit  
7
6
5
4
3
2
1
0
0x26 (0x46)  
Read/Write  
Initial Value  
TCNT0[7:0]  
TCNT0  
R/W  
0
R/W  
0
R/W  
0
R/W  
0
R/W  
0
R/W  
0
R/W  
0
R/W  
0
The Timer/Counter Register gives direct access, both for read and write operations, to the  
Timer/Counter unit 8-bit counter. Writing to the TCNT0 Register blocks (removes) the Compare  
Match on the following timer clock. Modifying the counter (TCNT0) while the counter is running,  
introduces a risk of missing a Compare Match between TCNT0 and the OCR0x Registers.  
15.9.4  
15.9.5  
15.9.6  
OCR0A – Output Compare Register A  
Bit  
7
6
5
4
3
2
1
0
0x27 (0x47)  
Read/Write  
Initial Value  
OCR0A[7:0]  
OCR0A  
R/W  
0
R/W  
0
R/W  
0
R/W  
0
R/W  
0
R/W  
0
R/W  
0
R/W  
0
The Output Compare Register A contains an 8-bit value that is continuously compared with the  
counter value (TCNT0). A match can be used to generate an Output Compare interrupt, or to  
generate a waveform output on the OC0A pin.  
OCR0B – Output Compare Register B  
Bit  
7
6
5
4
3
2
1
0
0x28 (0x48)  
Read/Write  
Initial Value  
OCR0B[7:0]  
OCR0B  
R/W  
0
R/W  
0
R/W  
0
R/W  
0
R/W  
0
R/W  
0
R/W  
0
R/W  
0
The Output Compare Register B contains an 8-bit value that is continuously compared with the  
counter value (TCNT0). A match can be used to generate an Output Compare interrupt, or to  
generate a waveform output on the OC0B pin.  
TIMSK0 – Timer/Counter Interrupt Mask Register  
Bit  
(0x6E)  
7
6
5
4
3
2
OCIE0B  
R/W  
0
1
OCIE0A  
R/W  
0
0
TOIE0  
R/W  
0
TIMSK0  
Read/Write  
Initial Value  
R
0
R
0
R
0
R
0
R
0
• Bits 7:3 – Res: Reserved Bits  
These bits are reserved bits and will always read as zero.  
106  
7799D–AVR–11/10  
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