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ATMEGA169PV 参数 Datasheet PDF下载

ATMEGA169PV图片预览
型号: ATMEGA169PV
PDF下载: 下载PDF文件 查看货源
内容描述: 微控制器,带有16K字节的系统内可编程闪存 [Microcontroller with 16K Bytes In-System Programmable Flash]
分类和应用: 闪存微控制器
文件页数/大小: 390 页 / 3485 K
品牌: ATMEL [ ATMEL ]
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ATmega169P  
PWM mode is shown in Figure 16-6. The TCNT2 value is in the timing diagram shown as a his-  
togram for illustrating the single-slope operation. The diagram includes non-inverted and  
inverted PWM outputs. The small horizontal line marks on the TCNT2 slopes represent compare  
matches between OCR2A and TCNT2.  
Figure 16-6. Fast PWM Mode, Timing Diagram  
OCRnx Interrupt Flag Set  
OCRnx Update and  
TOVn Interrupt Flag Set  
TCNTn  
(COMnx1:0 = 2)  
(COMnx1:0 = 3)  
OCnx  
OCnx  
1
2
3
4
5
6
7
Period  
The Timer/Counter Overflow Flag (TOV2) is set each time the counter reaches MAX. If the inter-  
rupt is enabled, the interrupt handler routine can be used for updating the compare value.  
In fast PWM mode, the compare unit allows generation of PWM waveforms on the OC2A pin.  
Setting the COM2A1:0 bits to two will produce a non-inverted PWM and an inverted PWM output  
can be generated by setting the COM2A1:0 to three (See Table 16-4 on page 154). The actual  
OC2A value will only be visible on the port pin if the data direction for the port pin is set as out-  
put. The PWM waveform is generated by setting (or clearing) the OC2A Register at the compare  
match between OCR2A and TCNT2, and clearing (or setting) the OC2A Register at the timer  
clock cycle the counter is cleared (changes from MAX to BOTTOM).  
The PWM frequency for the output can be calculated by the following equation:  
f
clk_I/O  
f
= -----------------  
OCnxPWM  
N 256  
The N variable represents the prescale factor (1, 8, 32, 64, 128, 256, or 1024).  
The extreme values for the OCR2A Register represent special cases when generating a PWM  
waveform output in the fast PWM mode. If the OCR2A is set equal to BOTTOM, the output will  
be a narrow spike for each MAX+1 timer clock cycle. Setting the OCR2A equal to MAX will result  
in a constantly high or low output (depending on the polarity of the output set by the COM2A1:0  
bits.)  
A frequency (with 50ꢀ duty cycle) waveform output in fast PWM mode can be achieved by set-  
ting OC2A to toggle its logical level on each compare match (COM2A1:0 = 1). The waveform  
generated will have a maximum frequency of foc2 = fclk_I/O/2 when OCR2A is set to zero. This fea-  
ture is similar to the OC2A toggle in CTC mode, except the double buffer feature of the Output  
Compare unit is enabled in the fast PWM mode.  
145  
8018A–AVR–03/06  
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