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ATMEGA128L-8AL 参数 Datasheet PDF下载

ATMEGA128L-8AL图片预览
型号: ATMEGA128L-8AL
PDF下载: 下载PDF文件 查看货源
内容描述: [RISC Microcontroller, 8-Bit, FLASH, 8MHz, CMOS, PQFP64, 14 X 14 MM, 1 MM HEIGHT, 0.80 MM PITCH, PLASTIC, MS-026AEB, TQFP-64]
分类和应用: 时钟微控制器外围集成电路
文件页数/大小: 391 页 / 6192 K
品牌: ATMEL [ ATMEL ]
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ATmega128(L)  
bottom  
Signalize that TCNT2 has reached minimum value (zero).  
Depending of the mode of operation used, the counter is cleared, incremented, or decremented  
at each timer clock (clkT2). clkT2 can be generated from an external or internal clock source,  
selected by the clock select bits (CS22:0). When no clock source is selected (CS22:0 = 0) the  
timer is stopped. However, the TCNT2 value can be accessed by the CPU, regardless of  
whether clkT2 is present or not. A CPU write overrides (has priority over) all counter clear or  
count operations.  
The counting sequence is determined by the setting of the WGM01 and WGM00 bits located in  
the Timer/Counter Control Register (TCCR2). There are close connections between how the  
counter behaves (counts) and how waveforms are generated on the output compare output  
OC2. For more details about advanced counting sequences and waveform generation, see  
“Modes of Operation” on page 149.  
The Timer/Counter overflow (TOV2) flag is set according to the mode of operation selected by  
the WGM21:0 bits. TOV2 can be used for generating a CPU interrupt.  
Output Compare  
Unit  
The 8-bit comparator continuously compares TCNT2 with the Output Compare Register  
(OCR2). Whenever TCNT2 equals OCR2, the comparator signals a match. A match will set the  
output compare flag (OCF2) at the next timer clock cycle. If enabled (OCIE2 = 1 and global inter-  
rupt flag in SREG is set), the output compare flag generates an output compare interrupt. The  
OCF2 flag is automatically cleared when the interrupt is executed. Alternatively, the OCF2 flag  
can be cleared by software by writing a logical one to its I/O bit location. The waveform genera-  
tor uses the match signal to generate an output according to operating mode set by the  
WGM21:0 bits and compare output mode (COM21:0) bits. The max and bottom signals are used  
by the waveform generator for handling the special cases of the extreme values in some modes  
of operation (see “Modes of Operation” on page 149). Figure 63 shows a block diagram of the  
output compare unit.  
Figure 63. Output Compare Unit, Block Diagram  
DATA BUS  
OCRn  
TCNTn  
= (8-bit Comparator )  
OCFn (Int.Req.)  
top  
bottom  
FOCn  
Waveform Generator  
OCn  
WGMn1:0  
COMn1:0  
The OCR2 Register is double buffered when using any of the pulse width modulation (PWM)  
modes. For the normal and Clear Timer on Compare (CTC) modes of operation, the double buff-  
147  
2467P–AVR–08/07  
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