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ATMEGA2560-16AU-SL383 参数 Datasheet PDF下载

ATMEGA2560-16AU-SL383图片预览
型号: ATMEGA2560-16AU-SL383
PDF下载: 下载PDF文件 查看货源
内容描述: [Microcontroller, 8-Bit, FLASH, AVR RISC CPU, 16MHz, CMOS, PQFP100, 14 X 14 MM, 1 MM HEIGHT, 0.50 MM PITCH, GREEN, PLASTIC, MS-026AED, TQFP-100]
分类和应用: 时钟微控制器
文件页数/大小: 448 页 / 7518 K
品牌: ATMEL [ ATMEL ]
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ATmega640/1280/1281/2560/2561  
• Bit 5 - PRTIM0: Power Reduction Timer/Counter0  
Writing a logic one to this bit shuts down the Timer/Counter0 module. When the Timer/Counter0  
is enabled, operation will continue like before the shutdown.  
• Bit 4 - Res: Reserved bit  
This bit is reserved bit and will always read as zero.  
• Bit 3 - PRTIM1: Power Reduction Timer/Counter1  
Writing a logic one to this bit shuts down the Timer/Counter1 module. When the Timer/Counter1  
is enabled, operation will continue like before the shutdown.  
• Bit 2 - PRSPI: Power Reduction Serial Peripheral Interface  
Writing a logic one to this bit shuts down the Serial Peripheral Interface by stopping the clock to  
the module. When waking up the SPI again, the SPI should be re initialized to ensure proper  
operation.  
• Bit 1 - PRUSART0: Power Reduction USART0  
Writing a logic one to this bit shuts down the USART0 by stopping the clock to the module.  
When waking up the USART0 again, the USART0 should be re initialized to ensure proper  
operation.  
• Bit 0 - PRADC: Power Reduction ADC  
Writing a logic one to this bit shuts down the ADC. The ADC must be disabled before shut down.  
The analog comparator cannot use the ADC input MUX when the ADC is shut down.  
11.9.3  
PRR1 – Power Reduction Register 1  
Bit  
(0x65)  
7
6
5
PRTIM5  
R/W  
0
4
PRTIM4  
R/W  
0
3
PRTIM3  
R/W  
0
2
PRUSART3  
R/W  
1
PRUSART2  
R/W  
0
PRUSART1  
R/W  
PRR1  
Read/Write  
R
0
R
0
Initial Value  
0
0
0
• Bit 7:6 - Res: Reserved bits  
These bits are reserved and will always read as zero.  
• Bit 5 - PRTIM5: Power Reduction Timer/Counter5  
Writing a logic one to this bit shuts down the Timer/Counter5 module. When the Timer/Counter5  
is enabled, operation will continue like before the shutdown.  
• Bit 4 - PRTIM4: Power Reduction Timer/Counter4  
Writing a logic one to this bit shuts down the Timer/Counter4 module. When the Timer/Counter4  
is enabled, operation will continue like before the shutdown.  
• Bit 3 - PRTIM3: Power Reduction Timer/Counter3  
Writing a logic one to this bit shuts down the Timer/Counter3 module. When the Timer/Counter3  
is enabled, operation will continue like before the shutdown.  
57  
2549L–AVR–08/07  
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