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ATMEGA2560-16AU-SL383 参数 Datasheet PDF下载

ATMEGA2560-16AU-SL383图片预览
型号: ATMEGA2560-16AU-SL383
PDF下载: 下载PDF文件 查看货源
内容描述: [Microcontroller, 8-Bit, FLASH, AVR RISC CPU, 16MHz, CMOS, PQFP100, 14 X 14 MM, 1 MM HEIGHT, 0.50 MM PITCH, GREEN, PLASTIC, MS-026AED, TQFP-100]
分类和应用: 时钟微控制器
文件页数/大小: 448 页 / 7518 K
品牌: ATMEL [ ATMEL ]
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9.2  
Register Description  
9.2.1  
9.2.1.1  
EEPROM registers  
EEARH and EEARL – The EEPROM Address Register  
Bit  
15  
14  
13  
12  
11  
EEAR11  
EEAR3  
3
10  
EEAR10  
EEAR2  
2
9
EEAR9  
EEAR1  
1
8
EEAR8  
EEAR0  
0
0x22 (0x42)  
0x21 (0x41)  
EEARH  
EEARL  
EEAR7  
EEAR6  
EEAR5  
EEAR4  
7
R
6
R
5
R
4
R
Read/Write  
R/W  
R/W  
X
R/W  
R/W  
X
R/W  
R/W  
X
R/W  
R/W  
X
R/W  
0
R/W  
0
R/W  
0
R/W  
0
Initial Value  
X
X
X
X
X
X
X
X
• Bits 15:12 – Res: Reserved Bits  
These bits are reserved bits and will always read as zero.  
• Bits 11:0 – EEAR8:0: EEPROM Address  
The EEPROM Address Registers – EEARH and EEARL specify the EEPROM address in the 4K  
bytes EEPROM space. The EEPROM data bytes are addressed linearly between 0 and 4096.  
The initial value of EEAR is undefined. A proper value must be written before the EEPROM may  
be accessed.  
9.2.1.2  
EEDR – The EEPROM Data Register  
Bit  
0x20 (0x40)  
7
6
5
4
3
2
1
0
MSB  
LSB  
R/W  
0
EEDR  
Read/Write  
R/W  
R/W  
R/W  
R/W  
R/W  
R/W  
R/W  
Initial Value  
0
0
0
0
0
0
0
• Bits 7:0 – EEDR7:0: EEPROM Data  
For the EEPROM write operation, the EEDR Register contains the data to be written to the  
EEPROM in the address given by the EEAR Register. For the EEPROM read operation, the  
EEDR contains the data read out from the EEPROM at the address given by EEAR.  
9.2.1.3  
EECR – The EEPROM Control Register  
Bit  
0x1F (0x3F)  
7
6
5
EEPM1  
R/W  
X
4
EEPM0  
R/W  
X
3
EERIE  
R/W  
0
2
EEMPE  
R/W  
0
1
EEPE  
R/W  
X
0
EERE  
R/W  
0
R
0
EECR  
Read/Write  
R
0
Initial Value  
• Bits 7:6 – Res: Reserved Bits  
These bits are reserved bits and will always read as zero.  
• Bits 5, 4 – EEPM1 and EEPM0: EEPROM Programming Mode Bits  
The EEPROM Programming mode bit setting defines which programming action that will be trig-  
gered when writing EEPE. It is possible to program data in one atomic operation (erase the old  
value and program the new value) or to split the Erase and Write operations in two different  
operations. The Programming times for the different modes are shown in Table 9-1. While EEPE  
is set, any write to EEPMn will be ignored. During reset, the EEPMn bits will be reset to 0b00  
unless the EEPROM is busy programming.  
34  
ATmega640/1280/1281/2560/2561  
2549L–AVR–08/07  
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