rupt Enable bit in SREG is cleared. A conversion can thus be triggered without causing an
interrupt. However, the interrupt flag must be cleared in order to trigger a new conversion at the
next interrupt event.
22.3.1
DAC Voltage Reference
The reference voltage for the ADC (VREF) indicates the conversion range for the DAC. VREF can
be selected as either AVCC, internal 2.56V reference, or external AREF pin.
AVCC is connected to the DAC through a passive switch. The internal 2.56V reference is gener-
ated from the internal bandgap reference (VBG) through an internal amplifier. In either case, the
external AREF pin is directly connected to the DAC, and the reference voltage can be made
more immune to noise by connecting a capacitor between the AREF pin and ground. VREF can
also be measured at the AREF pin with a high impedant voltmeter. Note that VREF is a high
impedant source, and only a capacitive load should be connected in a system.
If the user has a fixed voltage source connected to the AREF pin, the user may not use the other
reference voltage options in the application, as they will be shorted to the external voltage. If no
external voltage is applied to the AREF pin, the user may switch between AVCC and 2.56V as
reference selection. The first DAC conversion result after switching reference voltage source
may be inaccurate, and the user is advised to discard this result.
22.4 DAC Register Description
The DAC is controlled via three dedicated registers:
•
•
The DACON register which is used for DAC configuration
DACH and DACL which are used to set the value to be converted.
22.4.1
Digital to Analog Conversion Control Register – DACON
Bit
7
DAATE
R/W
0
6
DATS2
R/W
0
5
DATS1
R/W
0
4
DATS0
R/W
0
3
-
2
DALA
R/W
0
1
DAOE
R/W
0
0
DAEN
R/W
0
DACON
Read/Write
Initial Value
-
0
• Bit 7 – DAATE: DAC Auto Trigger Enable bit
Set this bit to update the DAC input value on the positive edge of the trigger signal selected with
the DACTS2-0 bit in DACON register.
Clear it to automatically update the DAC input when a value is written on DACH register.
• Bit 6:4 – DATS2, DATS1, DATS0: DAC Trigger Selection bits
These bits are only necessary in case the DAC works in auto trigger mode. It means if DAATE
bit is set.
In accordance with the Table 22-1, these 3 bits select the interrupt event which will generate the
update of the DAC input values. The update will be generated by the rising edge of the selected
interrupt flag whether the interrupt is enabled or not.
Table 22-1. DAC Auto Trigger source selection
DATS2
DATS1
DATS0
Description
0
0
0
0
0
0
1
1
0
1
0
1
Analog comparator 0
Analog comparator 1
External Interrupt Request 0
Timer/Counter0 Compare Match
260
AT90PWM2/3/2B/3B
4317J–AVR–08/10
ATMEL [ ATMEL ]
