AT90PWM2/3/2B/3B
Table 22-1. DAC Auto Trigger source selection (Continued)
DATS2
DATS1
DATS0
Description
1
1
1
1
0
0
1
1
0
1
0
1
Timer/Counter0 Overflow
Timer/Counter1 Compare Match B
Timer/Counter1 Overflow
Timer/Counter1 Capture Event
• Bit 2 – DALA: Digital to Analog Left Adjust
Set this bit to left adjust the DAC input data.
Clear it to right adjust the DAC input data.
The DALA bit affects the configuration of the DAC data registers. Changing this bit affects the
DAC output on the next DACH writing.
• Bit 1 – DAOE: Digital to Analog Output Enable bit
Set this bit to output the conversion result on D2A,
Clear it to use the DAC internally.
• Bit 0 – DAEN: Digital to Analog Enable bit
Set this bit to enable the DAC,
Clear it to disable the DAC.
22.4.2
Digital to Analog Converter input Register – DACH and DACL
DACH and DACL registers contain the value to be converted into analog voltage.
Writing the DACL register forbid the update of the input value until DACH has not been written
too. So the normal way to write a 10-bit value in the DAC register is firstly to write DACL the
DACH.
In order to work easily with only 8 bits, there is the possibility to left adjust the input value. Like
this it is sufficient to write DACH to update the DAC value.
22.4.2.1
DALA = 0
Bit
7
-
6
-
5
-
4
-
3
-
2
-
1
DAC9
DAC1
R/W
R/W
0
0
DAC8
DAC0
R/W
R/W
0
DACH
DACL
DAC7
R/W
R/W
0
DAC6
R/W
R/W
0
DAC5
R/W
R/W
0
DAC4
R/W
R/W
0
DAC3
R/W
R/W
0
DAC2
R/W
R/W
0
Read/Write
Initial Value
0
0
0
0
0
0
0
0
22.4.2.2
DALA = 1
Bit
7
DAC9
DAC1
R/W
R/W
0
6
DAC8
DAC0
R/W
R/W
0
5
DAC7
-
4
DAC6
-
3
DAC5
-
2
DAC4
-
1
DAC3
-
0
DAC2
-
DACH
DACL
Read/Write
Initial Value
R/W
R/W
0
R/W
R/W
0
R/W
R/W
0
R/W
R/W
0
R/W
R/W
0
R/W
R/W
0
0
0
0
0
0
0
0
0
261
4317J–AVR–08/10
ATMEL [ ATMEL ]
