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AT90PWM3B-16SU 参数 Datasheet PDF下载

AT90PWM3B-16SU图片预览
型号: AT90PWM3B-16SU
PDF下载: 下载PDF文件 查看货源
内容描述: 8位微控制器具有8K字节的系统内可编程闪存 [8-bit Microcontroller with 8K Bytes In-System Programmable Flash]
分类和应用: 闪存微控制器
文件页数/大小: 361 页 / 6022 K
品牌: ATMEL [ ATMEL ]
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Table 16-12. Synchronization Source Description in Centered Mode  
PSYNCn1  
PSYNCn0  
Description  
Send signal on match with OCRnRA (during counting down of PSC). The  
min value of OCRnRA must be 1.  
0
0
Send signal on match with OCRnRA (during counting up of PSC). The  
min value of OCRnRA must be 1.  
0
1
1
1
0
1
no synchronization signal  
no synchronization signal  
• Bit 3 – POEN2D : PSCOUT23 Output Enable (PSC2 only)  
When this bit is clear, second I/O pin affected to PSCOUT23 acts as a standard port.  
When this bit is set, second I/O pin affected to PSCOUT23 is connected to the PSC waveform  
generator B output and is set and clear according to the PSC operation.  
• Bit 2 – POENnB: PSC n OUT Part B Output Enable  
When this bit is clear, I/O pin affected to PSCOUTn1 acts as a standard port.  
When this bit is set, I/O pin affected to PSCOUTn1 is connected to the PSC waveform generator  
B output and is set and clear according to the PSC operation.  
• Bit 1 – POEN2C : PSCOUT22 Output Enable (PSC2 only)  
When this bit is clear, second I/O pin affected to PSCOUT22 acts as a standard port.  
When this bit is set, second I/O pin affected to PSCOUT22 is connected to the PSC waveform  
generator A output and is set and clear according to the PSC operation.  
• Bit 0 – POENnA: PSC n OUT Part A Output Enable  
When this bit is clear, I/O pin affected to PSCOUTn0 acts as a standard port.  
When this bit is set, I/O pin affected to PSCOUTn0 is connected to the PSC waveform generator  
A output and is set and clear according to the PSC operation.  
16.25.4 Output Compare SA Register – OCRnSAH and OCRnSAL  
Bit  
7
6
5
4
3
2
1
0
OCRnSA[11:8]  
OCRnSAH  
OCRnSAL  
OCRnSA[7:0]  
Read/Write  
Initial Value  
W
0
W
0
W
0
W
0
W
0
W
0
W
0
W
0
16.25.5 Output Compare RA Register – OCRnRAH and OCRnRAL  
Bit  
7
6
5
4
3
2
1
0
OCRnRA[11:8]  
OCRnRAH  
OCRnRAL  
OCRnRA[7:0]  
Read/Write  
Initial Value  
W
0
W
0
W
0
W
0
W
0
W
0
W
0
W
0
16.25.6 Output Compare SB Register – OCRnSBH and OCRnSBL  
Bit  
7
6
5
4
3
2
1
0
OCRnSB[11:8]  
OCRnSBH  
OCRnSBL  
OCRnSB[7:0]  
162  
AT90PWM2/3/2B/3B  
4317J–AVR–08/10  
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