Figure 16-9. PSCn0 & PSCn1 Basic Waveforms in Center Aligned Mode
PSC Counter
OCRnRB
OCRnSB
OCRnSA
0
On-Time 0
On-Time 1
On-Time 1
PSCOUTn0
PSCOUTn1
(AT90PWM2/3)
PSCOUTn1
(AT90PWM2B/3B)
Dead-Time
Dead-Time
PSC Cycle
On-Time 0 = 2 * OCRnSAH/L * 1/Fclkpsc
On-Time 1 = 2 * (OCRnRBH/L - OCRnSBH/L + 1) * 1/Fclkpsc
Dead-Time = (OCRnSBH/L - OCRnSAH/L) * 1/Fclkpsc
PSC Cycle = 2 * (OCRnRBH/L + 1) * 1/Fclkpsc
Note:
Minimal value for PSC Cycle = 2 * 1/Fclkpsc
OCRnRAH/L is not used to control PSC Output waveform timing. Nevertheless, it can be useful
to adjust ADC synchronization (See “Analog Synchronization” on page 157.).
Figure 16-10. Run and Stop Mechanism in Centered Mode
OCRnRB
OCRnSB
OCRnSA
PSC Counter
0
Run
PSCOUTn0
PSCOUTn1
(AT90PWM2/3)
PSCOUTn1
(AT90PWM2B/3B)
Note:
See “PSC 0 Control Register – PCTL0” on page 164.(or PCTL1 or PCTL2)
138
AT90PWM2/3/2B/3B
4317J–AVR–08/10
ATMEL [ ATMEL ]
