Table 10. Interrupt Enable (IE) Register
(MSB)(LSB)
EA
–
ET2
ES
ET1
EX1
ET0
EX0
Enable Bit = 1 enables the interrupt.
Enable Bit = 0 disables the interrupt.
Symbol
Position
Function
EA
IE.7
Disables all interrupts. If EA = 0, no interrupt is acknowledged. If EA = 1, each interrupt
source is individually enabled or disabled by setting or clearing its enable bit.
–
IE.6
IE.5
IE.4
IE.3
IE.2
IE.1
IE.0
Reserved.
ET2
ES
Timer 2 interrupt enable bit.
SPI and UART interrupt enable bit.
Timer 1 interrupt enable bit.
External interrupt 1 enable bit.
Timer 0 interrupt enable bit.
External interrupt 0 enable bit.
ET1
EX1
ET0
EX0
User software should never write 1s to unimplemented bits, because they may be used in future AT89 products.
Figure 10. Interrupt Sources
20
AT89S8252
0401G–MICRO–3/06
ATMEL [ ATMEL ]
